Exploiting Symmetries for Testing Equivalence in the Spi Calculus

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Item Type: Proceeding
MIUR type: Proceedings > Proceedings
Title: Exploiting Symmetries for Testing Equivalence in the Spi Calculus
Authors string: Cibrario Bertolotti I.; Durante L.; Sisto R.; Valenzano A.
University authors:
Page Range: pp. 135-149
Journal or Publication Title: LECTURE NOTES IN COMPUTER SCIENCE
Referee type: Not specified type
Publisher: Springer
ISSN: 0302-9743
Volume: 3299
Event Title: Second International Conference, ATVA 2004, Taipei, Taiwan, ROC
Event Location: Taipei (TW)
Event Dates: October 31-November 3, 2004
Abstract: Testing equivalence is a quite powerful way of expressing security properties of cryptographic protocols, but its formal verification is a difficult task, because it is based on the universal quantification over contexts. A technique based on state exploration to address this verification problem has been previously presented; it relies on an environment-sensitive labelled transition system (ES-LTS) and on symbolic term representation. This paper shows that such a technique can be enhanced by exploiting symmetries found in the ES-LTS structure. Experimental results show that the proposed enhancement can substantially reduce the size of the ES-LTS and that the technique as a whole compares favorably with respect to related work
Date: 2004
Status: Published
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Uncontrolled Keywords:
Departments (original): DAUIN - Control and Computer Engineering
Departments: DAUIN - Department of Control and Computer Engineering
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    Subjects: Area 09 - Ingegneria industriale e dell'informazione > SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI
    Date Deposited: 05 Oct 2006 14:10
    Last Modified: 11 Jul 2014 00:06
    Id Number (DOI): 10.1007/978-3-540-30476-0_15
    Permalink: http://porto.polito.it/id/eprint/1418143
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