Design of fixed-point iterative decoders for concatenated codes with interleavers

Implementation rules for iterative decoders of concatenated codes with interleavers are proposed based on a study of the quantization effects on the performance. We consider both cases of a single soft-input soft-output (SISO) module performing sequentially all iterations and of a pipelined structure in which a dedicated hardware is in charge of each SISO operation. In the last case, we show that a suitable rescaling of the extrinsic informations yields almost ideal performance with the same number of bits (5) representing both LLRs and extrinsic information at any decoder stage.