Timing driven placement for fault tolerant circuits implemented on SRAM-based FPGAs

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Item Type: Article
MIUR type: Article > Journal article
Title: Timing driven placement for fault tolerant circuits implemented on SRAM-based FPGAs
Authors string: Sterpone L.
University authors:
Journal or Publication Title: LECTURE NOTES IN COMPUTER SCIENCE
Referee type: Not specified type
Volume: 5453
Page Range: pp. 85-96
Number of Pages: 12
ISSN: 0302-9743
Date: 2009
Status: Published
Language of publication: English
Uncontrolled Keywords:
Departments (original): DAUIN - Control and Computer Engineering
Departments: DAUIN - Department of Control and Computer Engineering
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    Date Deposited: 21 Dec 2009 11:12
    Last Modified: 16 Oct 2013 03:29
    Id Number (DOI): 10.1007/978-3-642-00641-8_11
    Permalink: http://porto.polito.it/id/eprint/1894241
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