SBST (Software Based Self-Testing) is an effective solution for in-system testing of SoCs without any additional hardware requirement. SBST is particularly suited for embedded blocks with limited accessibility, such as cache memories. Several methodologies have been proposed to properly adapt existing March algorithms to test cache memories. Unfortunately they all leave the test engineers the task of manually coding them into the specific Instruction Set Architecture (ISA) of the target microprocessor. We propose an EDA tool for the automatic generation of assembly cache test program for a specific architecture.

MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches / DI CARLO, Stefano; Gambardella, Giulio; Indaco, Marco; Rolfo, Daniele; Prinetto, Paolo Ernesto. - STAMPA. - (2011), pp. 401-406. (Intervento presentato al convegno IEEE 20th Asian Test Symposium (ATS) tenutosi a New Delhi, IN nel 20-23 Nov. 2011) [10.1109/ATS.2011.78].

MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches

DI CARLO, STEFANO;GAMBARDELLA, GIULIO;INDACO, MARCO;ROLFO, DANIELE;PRINETTO, Paolo Ernesto
2011

Abstract

SBST (Software Based Self-Testing) is an effective solution for in-system testing of SoCs without any additional hardware requirement. SBST is particularly suited for embedded blocks with limited accessibility, such as cache memories. Several methodologies have been proposed to properly adapt existing March algorithms to test cache memories. Unfortunately they all leave the test engineers the task of manually coding them into the specific Instruction Set Architecture (ISA) of the target microprocessor. We propose an EDA tool for the automatic generation of assembly cache test program for a specific architecture.
2011
9781457719844
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2460563
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