Dynamic Partial Reconfiguration allows to dynamically change the behaviour of a portion of the FPGAs by downloading new information in the configuration memory of the device. Since modern Systems on Programmable Chips (SoPCs) make extensive use of this feature, many reconfigurable area are placed in the device, with several configurations for each area. This comes at a cost in terms of dependability of the system and of memory occupation. The proposed methodology focuses on increasing the dependability of partially reconfigurable systems by safely storing compressed configuration data inside the FPGA.
ZipStream: improving dependability in Dynamic Partial Reconfiguration / DI CARLO, Stefano; Gambardella, Giulio; Huynh Bao, T.; Prinetto, Paolo Ernesto; Rolfo, Daniele; Trotta, Pascal. - ELETTRONICO. - (2013), pp. 1-6. (Intervento presentato al convegno IEEE 8th International Design and Test Symposium (IDT) tenutosi a Marrakesh, MA nel 16-18 Dec. 2013) [10.1109/IDT.2013.6727128].
ZipStream: improving dependability in Dynamic Partial Reconfiguration
DI CARLO, STEFANO;GAMBARDELLA, GIULIO;PRINETTO, Paolo Ernesto;ROLFO, DANIELE;TROTTA, PASCAL
2013
Abstract
Dynamic Partial Reconfiguration allows to dynamically change the behaviour of a portion of the FPGAs by downloading new information in the configuration memory of the device. Since modern Systems on Programmable Chips (SoPCs) make extensive use of this feature, many reconfigurable area are placed in the device, with several configurations for each area. This comes at a cost in terms of dependability of the system and of memory occupation. The proposed methodology focuses on increasing the dependability of partially reconfigurable systems by safely storing compressed configuration data inside the FPGA.File | Dimensione | Formato | |
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2012-IDT-ZIPSTREAM-AuthorVersion.pdf
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https://hdl.handle.net/11583/2504958
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