Traditionally, heavy ion radiation effects affecting digital systems working in safety critical application systems has been of huge interest. Nowadays, due to the shrinking technology process, Integrated Circuits became sensitive also to other kinds of radiation particles such as neutron that can exist at the earth surface and affects ground-level safety critical applications such as automotive or medical systems. The process of analyzing and hardening digital devices against soft errors implies rising the final cost due to time expensive fault injection campaigns and radiation tests, as well as reducing system performance due to the insertion of redundancy-based mitigation solutions. The main industrial problem arising is the localization of the critical elements in the circuit in order to apply optimal mitigation techniques. The proposal of this tutorial is to present and discuss different solutions currently available for assessing and implementing the fault tolerance of digital circuits, not only when the unique design description is provided but also at the component level, especially when Commercial-of-the-shelf (COTS) devices are selected.

Fault injection and fault tolerance methodologies for assessing device robustness and mitigating against ionizing radiation / Alexandrescu, Dan; Sterpone, Luca; Lopez Ongil, Celia. - ELETTRONICO. - (2014), pp. 1-6. (Intervento presentato al convegno IEEE European Test Symposium tenutosi a Paderborn nel 26 - 30 Maggio) [10.1109/ETS.2014.6847812].

Fault injection and fault tolerance methodologies for assessing device robustness and mitigating against ionizing radiation

STERPONE, Luca;
2014

Abstract

Traditionally, heavy ion radiation effects affecting digital systems working in safety critical application systems has been of huge interest. Nowadays, due to the shrinking technology process, Integrated Circuits became sensitive also to other kinds of radiation particles such as neutron that can exist at the earth surface and affects ground-level safety critical applications such as automotive or medical systems. The process of analyzing and hardening digital devices against soft errors implies rising the final cost due to time expensive fault injection campaigns and radiation tests, as well as reducing system performance due to the insertion of redundancy-based mitigation solutions. The main industrial problem arising is the localization of the critical elements in the circuit in order to apply optimal mitigation techniques. The proposal of this tutorial is to present and discuss different solutions currently available for assessing and implementing the fault tolerance of digital circuits, not only when the unique design description is provided but also at the component level, especially when Commercial-of-the-shelf (COTS) devices are selected.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2556754
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