Signal and Power Integrity (SI/PI) verification flows rely on accurate models for complex I/O-buffers that drive and receive electrical signals on high-speed channels. The sheer density of modern integrated circuits makes detailed transistor-level descriptions computationally cumbersome to the point where they become unusable for system level simulations. Fortunately, transistor-level descriptions may be replaced with more compact representations that approximate the input/output buffers behavior with considerable accuracy while providing a simulation speedup of several orders of magnitude. Known as behavioral models, surrogate models or macromodels, these computationally efficient equivalents have become a de-facto industry standard in SI/ PI simulations. This paper presents an overview of the state-of-the-art in I/O-buffer behavioral modeling, introducing the main features of both standard and emerging solutions. Open issues and future research directions are also discussed.

Present and future of I/O-buffer behavioral macromodels / Signorini, G.; Siviero, Claudio; Telescu, M.; Stievano, IGOR SIMONE. - In: IEEE ELECTROMAGNETIC COMPATIBILITY MAGAZINE. - ISSN 2162-2264. - STAMPA. - 5:3(2016), pp. 79-85. [10.1109/MEMC.0.7764256]

Present and future of I/O-buffer behavioral macromodels

SIVIERO, CLAUDIO;STIEVANO, IGOR SIMONE
2016

Abstract

Signal and Power Integrity (SI/PI) verification flows rely on accurate models for complex I/O-buffers that drive and receive electrical signals on high-speed channels. The sheer density of modern integrated circuits makes detailed transistor-level descriptions computationally cumbersome to the point where they become unusable for system level simulations. Fortunately, transistor-level descriptions may be replaced with more compact representations that approximate the input/output buffers behavior with considerable accuracy while providing a simulation speedup of several orders of magnitude. Known as behavioral models, surrogate models or macromodels, these computationally efficient equivalents have become a de-facto industry standard in SI/ PI simulations. This paper presents an overview of the state-of-the-art in I/O-buffer behavioral modeling, introducing the main features of both standard and emerging solutions. Open issues and future research directions are also discussed.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2659625
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