this paper presents an analysis of IC immunity carried out on a TX/RX digital system, implemented in a FPGA board and several inverter gates. A DPI measurement setup is built and used to measure the immunity of signal I/O ports to conducted continuous-wave interference. Therefore the injection path from RF noise source to input pin is characterized to define the injected power level causing a malfunction on the TX/RX system, up to 250 MHz. Furthermore, jitter characteristics are evaluated varying frequency and noise power.

Digital System Immunity Characterization via DPI Aggression / Fontana, Michele; Rigazio, L.; Canavero, Flavio; Perraud, R.. - STAMPA. - (2012), pp. 1-6. (Intervento presentato al convegno 16ème édition du Colloque International sur la Compatibilité ElectroMagnétique (CEM 2012) tenutosi a Rouen (France) nel April 25-27).

Digital System Immunity Characterization via DPI Aggression

FONTANA, MICHELE;CANAVERO, Flavio;
2012

Abstract

this paper presents an analysis of IC immunity carried out on a TX/RX digital system, implemented in a FPGA board and several inverter gates. A DPI measurement setup is built and used to measure the immunity of signal I/O ports to conducted continuous-wave interference. Therefore the injection path from RF noise source to input pin is characterized to define the injected power level causing a malfunction on the TX/RX system, up to 250 MHz. Furthermore, jitter characteristics are evaluated varying frequency and noise power.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2498532
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