Pubblicazioni dell'autore: Massimo Poncino [Rubrica]

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Numero di pubblicazioni : 331.

In corso di stampa

Brevetto Jahier Pagliari, Daniele; Poncino, Massimo; Durand, Yves; Beigne, Edith;
Processing circuit capable of dynamically modifying its precision. -. [Disponibilità ristretta]
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Articolo in atti di convegno Mahmood H., Poncino M.,Macii E.
Cache Aging Reduction with Improved Performance using Dynamically Re-sizable Cache. In: DATE 2014: Design, Automation & Test in Europe Conference & Exhibition, Dresden, Germany, 24-28 March, 2014. (In stampa)
Web of Science: 0 - Scopus: 3

Articolo di rivista Bocca, Alberto; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Composable Battery Model Templates Based on Manufacturers' Data. In: IEEE DESIGN & TEST, pp. 1-5. - ISSN 2168-2356 (In stampa)

2017

Articolo di rivista Bocca, Alberto; Chen, Yukai; Macii, Alberto; Macii, Enrico; Poncino, Massimo (2017)
Aging and Cost Optimal Residential Charging for Plug-in EVs. In: IEEE DESIGN & TEST, vol. PP n. 99, pp. 1-6. - ISSN 2168-2356 (In stampa)

Articolo di rivista Jahier Pagliari, Daniele; Macii, Enrico; Poncino, Massimo (2017)
Approximate energy-efficient encoding for serial interfaces. In: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, vol. 22 n. 4, pp. 1-25. - ISSN 1084-4309
Web of Science: 0 - Scopus: 0
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Articolo di rivista Grüttner, Kim; Görgen, Ralph; Schreiner, Sören; Herrera, Fernando; Peñil, Pablo; Medina, Julio; Villar, Eugenio; Palermo, Gianluca; Fornaciari, William; Brandolese, Carlo; Gadioli, Davide; Vitali, Emanuele; Zoni, Davide; Bocchio, Sara; Ceva, Luca; Azzoni, Paolo; Poncino, Massimo; Vinco, Sara; Macii, Enrico; Cusenza, Salvatore; Favaro, John; Valencia, Raúl; Sander, Ingo; Rosvall, Kathrin; Khalilzad, Nima; Quaglia, Davide (2017)
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties. In: MICROPROCESSORS AND MICROSYSTEMS, vol. 51, pp. 39-55. - ISSN 0141-9331
Web of Science: 0 - Scopus: 0

Articolo di rivista Chen, Yukai; Macii, Enrico; Poncino, Massimo (2017)
Empirical derivation of upper and lower bounds of NBTI aging for embedded cores. In: MICROELECTRONICS RELIABILITY, vol. PP, pp. 1-12. - ISSN 0026-2714 [Disponibilità ristretta]
Scopus: 0
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Articolo di rivista Vinco, Sara; Chen, Yukai; Fummi, Franco; Macii, Enrico; Poncino, Massimo (2017)
A Layered Methodology for the Simulation of Extra-Functional Properties in Smart Systems. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. PP n. 99, pp. 1-14. - ISSN 0278-0070

Capitolo di libro Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2017)
Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits. In: VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability. Springer, pp. 60-82. ISBN 978-3-319-67103-1

Articolo in atti di convegno Jahier Pagliari, Daniele; Macii, Enrico; Poncino, Massimo (2017)
Optimal Content-Dependent Dynamic Brightness Scaling for OLED Displays. In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Thessaloniki (Greece), 25-27 September 2017. pp. 1-6

Articolo in atti di convegno Chen, Yukai; Macii, Enrico; Poncino, Massimo (2017)
Workload-driven frequency-aware battery sizing. In: IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Taipei, Taiwan, 24-26 July 2017. pp. 1-6
Scopus: 0

Articolo di rivista Jahier Pagliari, Daniele; Macii, Enrico; Poncino, Massimo (2017)
Zero-Transition Serial Encoding for Image Sensors. In: IEEE SENSORS JOURNAL, vol. 17 n. 8, pp. 2563-2571. - ISSN 1530-437X
Web of Science: 0
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Articolo in atti di convegno Chen, Yukai; Macii, Enrico; Poncino, Massimo (2017)
A circuit-equivalent battery model accounting for the dependency on load frequency. In: 20th Design, Automation and Test in Europe, DATE 2017, Lausanne(Switzerland), 27 March 2017 - 31 March 2017. pp. 1177-1182
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Jahier Pagliari, Daniele; Durand, Yves; Coriat, David; Molnos, Anca; Beigne, Edith; Macii, Enrico; Poncino, Massimo (2017)
A methodology for the design of dynamic accuracy operators by runtime back bias. In: 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE), Lausanne (Switzerland), 27-31 March 2017. pp. 1165-1170
Web of Science: 0 - Scopus: 0
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Articolo di rivista Bocca, Alberto; Macii, Alberto; Poncino, Massimo (2017)
A modular framework for battery modeling in electronic designs. In: JOURNAL OF LOW POWER ELECTRONICS, vol. 13 n. 3, pp. 371-381. - ISSN 1546-1998
Scopus: 0

2016

Articolo in atti di convegno Jahier Pagliari, Daniele; Macii, Enrico; Poncino, Massimo (2016)
Approximate differential encoding for energy-efficient serial communication. In: 26th ACM Great Lakes Symposium on VLSI, GLSVLSI 2016, usa, May 18 - 20 2016. pp. 421-426 [Disponibilità ristretta]
Web of Science: 1 - Scopus: 2
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Articolo in atti di convegno Goren, Ralph; Gruttner, Kim; Herrera, Fernando; Penil, Pablo; Medina, Julio; Villar, Eugenio; Palermo, Gianluca; Fornaciari, William; Brandolese, Carlo; Gadioli, Davide; Bocchio, Sara; Ceva, Luca; Azzoni, Paolo; Poncino, Massimo; Vinco, Sara; Macii, Enrico; Cusenza, Salvatore; Favaro, John; Valencia, Raul; Sander, Ingo; Rosvall, Kathrin; Quaglia, Davide (2016)
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties. In: Conference on Digital System Design (DSD), 2016, Cyprus, 31 Agosto - 2 Settembre 2016. pp. 286-293
Web of Science: 1 - Scopus: 4

Articolo in atti di convegno Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
Enabling quasi-adiabatic logic arrays for silicon and beyond-silicon technologies. In: 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal's Sheraton Centre, can, 2016. p. 2897
Web of Science: 0 - Scopus: 0

Capitolo di libro Jahier Pagliari, Daniele; Poncino, Massimo; Macii, Enrico (2016)
Energy-efficient digital processing via Approximate Computing. In: Smart Systems Integration and Simulation / Bombieri N., Poncino M., Pravadelli G. Springer, pp. 55-89. ISBN 978-3-319-27390-7
Scopus: 2

Articolo in atti di convegno Chen, Yukai; Vinco, Sara; Macii, Enrico; Poncino, Massimo (2016)
Fast thermal simulation using SystemC-AMS. In: ACM Great Lake Symposium on VLSI (GLSVLSI), Boston, Massachusetts, USA, 2016. pp. 427-432
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno Chen, Yukai; Macii, Enrico; Poncino, Massimo (2016)
Frequency Domain Characterization of Batteries for the Design of Energy Storage Subsystems. In: 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Tallinn, ESTONIA, September 26-28, 2016.
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
Graphene-PLA (GPLA): A compact and ultra-low power logic array architecture. In: 26th ACM Great Lakes Symposium on VLSI, GLSVLSI 2016, usa, 2016. pp. 145-150
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Vinco, Sara; Lora, Michele; Macii, Enrico; Poncino, Massimo (2016)
IP-XACT for Smart Systems Design: Extensions for the Integration of Functional and Extra-Functional Models. In: Forum on Specification & Design Languages (FDL), 2016, Bremen, 14-16 settembre 2016. pp. 1-8
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Chen, Yukai; Bocca, Alberto; Macii, Alberto; Macii, Enrico; Poncino, Massimo (2016)
A Li-ion battery charge protocol with optimal aging-quality of service trade-off. In: 2016 International Symposium on Low Power Electronics and Design, San Francisco Airport, CA, USA, August 8-10,2016. pp. 40-45

Articolo in atti di convegno Jahier Pagliari, Daniele; Poncino, Massimo; Macii, Enrico (2016)
Low-overhead adaptive constrast enhancement and power reduction for OLEDs. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, Dresden (GER), 14-18 March 2016. pp. 343-348 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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Capitolo di libro Vinco, Sara; Sassone, Alessandro; Poncino, Massimo; Macii, Enrico; Gangemi, Giuliana; Canegallo, Roberto (2016)
Modeling and Simulation of the Power Flow in Smart Systems. In: Smart Systems Integration and Simulation / Nicola Bombieri; Massimo Poncino; Graziano Pravadelli. Springer International Publishing, pp. 169-194. ISBN 978-3-319-27390-7

Articolo in atti di convegno Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits. In: 24th Annual IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallin, Estonia, 26-28 Settembre 2016. pp. 1-6
Web of Science: 0 - Scopus: 1

Articolo di rivista Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS. - ISSN 1549-7747
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Jahier Pagliari, Daniele; Macii, Enrico; Poncino, Massimo (2016)
Serial T0: Approximate bus encoding for energy-efficient transmission of sensor signals. In: 53rd Annual ACM IEEE Design Automation Conference, DAC 2016, Austin Convention Center, usa, 5-9 June 2016. pp. 1-6 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 2
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Capitolo di libro Sassone, Alessandro; Grosso, Michelangelo; Poncino, Massimo; Macii, Enrico (2016)
Smart Electronic Systems: An Overview. In: Smart systems integration and simulation / Bombieri N., Poncino M., Pravadelli G. Springer, pp. 5-21. ISBN 978-3-319-27390-7

Capitolo di libro Bocca, Alberto; Sassone, Alessandro; Shin, Donghwa; Macii, Alberto; Macii, Enrico; Poncino, Massimo (2016)
A temperature-aware battery cycle life model for different battery chemistries. In: VLSI-SoC: Design for Reliability, Security, and Low Power / Shin Y., Tsui C.Y., Kim J.J., Choi K., Reis R. Springer International Publishing, pp. 109-130. ISBN 978-3-319-46096-3
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Vinco, Sara; Chen, Yukai; Macii, Enrico; Poncino, Massimo (2016)
A unified model of power sources for the simulation of electrical energy systems. In: ACM Great Lake Symposium on VLSI (GLSVLSI), Boston, Massachusetts, USA, 18/05/2016-20/20/2016. pp. 281-286
Web of Science: 0 - Scopus: 0

2015

Articolo di rivista Bombieri, N.; Drogoudis, D.; Gangemi, G.; Gillon, R.; Grosso, M.; Macii, E.; Poncino, M.; Rinaudo, S. (2015)
Addressing the Smart Systems Design Challenge: The SMAC Platform. In: MICROPROCESSORS AND MICROSYSTEMS, vol. 39 n. 8, pp. 1158-1173. - ISSN 0141-9331
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Jahier Pagliari, Daniele; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
An Automated Design Flow for Approximate Circuits based on Reduced Precision Redundancy. In: 33rd IEEE International Conference on Computer Design (ICCD), New York City (USA), 18-22 Ottobre 2015. pp. 86-93
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Chen, Yukai; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
Characterizing the Activity Factor in NBTI Aging Models for Embedded Cores. In: Great Lakes Symposium on VLSI, Pittsburgh, Pennsylvania, USA, 20-22 Maggio 2015. pp. 75-78
Scopus: 1

Articolo in atti di convegno Rizzo, Roberto Giorgio; Miryala, Sandeep; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions. In: GLSVLSI '15, Pittsburgh, PA (USA), 20-22 May. pp. 253-258
Scopus: 1

Articolo in atti di convegno Miryala, Sandeep; Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo; Amarú, Luca; De Micheli, Giovanni; Gaillardon, Pierre-Emmanuel (2015)
Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. In: Great Lakes Symposium on VLSI. pp. 39-44 [Disponibilità ristretta]
Scopus: 3
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Articolo in atti di convegno Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
One-pass logic synthesis for graphene-based Pass-XNOR logic circuits. In: 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015, usa, 2015. pp. 1-6 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 8
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Articolo di rivista Shin, Donghwa; Poncino, Massimo; Macii, Enrico; Chang, Naehyuck (2015)
A Statistical Model-Based Cell-to-Cell Variability Management of Li-ion Battery Pack. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 34 n. 2, pp. 252-265. - ISSN 0278-0070
Web of Science: 4 - Scopus: 5

Articolo di rivista Crepaldi, M.; Sanginario, A.; Motto Ros, P.; Grosso, M.; Sassone, A.; Poncino, M.; Macii, E.; Rinaudo, S.; Gangemi, G.; Demarchi, D. (2015)
Towards Multi-Domain and Multi-Physical Electronic Design. In: IEEE CIRCUITS AND SYSTEMS MAGAZINE, vol. 15 n. 3, pp. 18-43. - ISSN 1531-636X [Disponibilità ristretta]
Web of Science: 1 - Scopus: 3
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Articolo di rivista Miryala, Sandeep; Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
Ultra-low power circuits using graphene p-n junctions and adiabatic computing. In: MICROPROCESSORS AND MICROSYSTEMS, vol. 39 n. 8, pp. 962-972. - ISSN 0141-9331
Web of Science: 2 - Scopus: 3
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Articolo in atti di convegno Bocca, Alberto; Sassone, Alessandro; Macii, Alberto; Macii, Enrico; Poncino, Massimo (2015)
An aging-aware battery charge scheme for mobile devices exploiting plug-in time patterns. In: 33rd IEEE International Conference on Computer Design (ICCD), New York City, USA, 18-21 October 2015. pp. 407-410
Web of Science: 1 - Scopus: 1

Articolo in atti di convegno Bocca, Alberto; Sassone, Alessandro; Shin, Donghwa; Macii, Alberto; Macii, Enrico; Poncino, Massimo (2015)
An equation-based battery cycle life model for various battery chemistries. In: 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Daejeon, Korea, October 5-7, 2015. pp. 57-62
Web of Science: 2 - Scopus: 3

2014

Articolo in atti di convegno Petricca M.; Shin D.; Bocca A.; Macii A.; Macii E.; Poncino M. (2014)
Automated generation of battery aging models from datasheets. In: 2014 32nd IEEE International Conference on Computer Design (ICCD), Seoul, Korea, 19-22 October 2014. pp. 483-488
Web of Science: 2 - Scopus: 5

Articolo in atti di convegno H. Mahmood; M. Poncino; E. Macii (2014)
Cache Aging Reduction with Improved Performance using Dynamically Re-sizable Cache. In: Design, Automation and Test in Europe. pp. 1-6
Web of Science: 0 - Scopus: 3

Articolo in atti di convegno Donghwa Shin, Alessandro Sassone, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino (2014)
A Compact Macromodel for the Charge Phase of a Battery with Typical Charging Protocol. In: 2014 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED'14), La Jolla, CA, USA, August 11-13, 2014. pp. 267-270
Scopus: 1

Articolo in atti di convegno Guarnieri V.; Petricca M.; Sassone A.; Vinco S.; Bombieri N.; Fummi F.; Macii E.; Poncino M. (2014)
A Cross-Level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014, Dresda, Germany, 24-28 March 2014. pp. 1-6
Web of Science: 0 - Scopus: 0

Articolo di rivista Calimera A.; Loghi M.; Macii E.; Poncino M. (2014)
Dynamic Indexing: Leakage-Aging Co-Optimization for Caches. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 33 n. 2, pp. 251-264. - ISSN 0278-0070
Web of Science: 1 - Scopus: 3

Articolo in atti di convegno Alessandro Sassone; Sara Vinco; Massimo Poncino; Enrico Macii (2014)
An Efficient Simulation Methodology for Electrical Energy Systems. In: 10th Conference on Ph.D Research in Microelectronics and Electronics (PRIME 2014), Grenoble, France, June 30 2014 -July 3 2014. pp. 1-4
Web of Science: 0 - Scopus: 0

Articolo di rivista Haroon Mahmood; Mirko Loghi; Massimo Poncino; Enrico Macii (2014)
Energy/Lifetime Cooptimization by Cache Partitioning With Graceful Performance Degradation. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 22 n. 8, pp. 1705-1716. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 3
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Articolo in atti di convegno Sara Vinco, Alessandro Sassone, Davide Lasorsa, Enrico Macii, Massimo Poncino (2014)
A Framework for Efficient Evaluation and Comparison of EES Models. In: 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014, Palma de Mallorca, Spain, September 29 - October 1, 2014. pp. 1-8
Scopus: 0

Articolo di rivista S. Miryala.; M. Oleiro; L. Bolzani Pohls; A. Calimera; E. Macii; M. Poncino; (2014)
Modeling of Physical Defects in PN-Junction Based Graphene Devices. In: JOURNAL OF ELECTRONIC TESTING, vol. 30 n. 3, pp. 357-370. - ISSN 0923-8174
Web of Science: 1 - Scopus: 1

Articolo in atti di convegno Sassone A., Shin D., Bocca A., Macii A., Macii E., Poncino M. (2014)
Modeling of the Charging Behavior of Li-Ion Batteries based on Manufacturer's Data. In: 24th ACM Great lakes symposium on VLSI (GLSVLSI'14), Houston, TX, USA, May 21-23 2014. pp. 39-44
Web of Science: 1 - Scopus: 3

Articolo in atti di convegno R. Gillon; G. Gangemi; M. Grosso; F. Fummi; M. Poncino (2014)
Multi-Domain Simulation as a Foundation for the Engineering of Smart Systems: Challenges and the SMAC Vision. In: ICECS'14: 8th IEEE International Conference on Electronics, Circuits and Systems. pp. 1-4
Web of Science: 1 - Scopus: 2

Articolo in atti di convegno Sara Vinco, Alessandro Sassone, Franco Fummi, Enrico Macii, Massimo Poncino (2014)
An Open-Source Framework for Formal Specification and Simulation of Electrical Energy Systems. In: 2014 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED'14), La Jolla, CA, USA, August 11-13, 2014. pp. 287-290
Scopus: 6

Articolo in atti di convegno Tenace V.; Calimera A.; Macii E.; Poncino M. (2014)
Pass-XNOR Logic: A new Logic Style for P-N Junction based Graphene Circuits. In: DATE-14: ACM/IEEE Design, Automation and Test in Europe.
Web of Science: 0 - Scopus: 10

Articolo in atti di convegno V. Tenace; A. Calimera; E. Macii; M. Poncino (2014)
Quantifying the figures of merit of graphene-based adiabatic Pass-XNOR Logic (PXL) circuits. In: PRIME-14: IEEE Conference on Ph.D. Research in Microelectronics and Electronics. pp. 1-4
Web of Science: 0 - Scopus: 2

Articolo di rivista Tenace V.; Miryala S.; Calimera A.; Macii A.; Macii E.; Poncino M. (2014)
Row-Based Body-Bias Assignment for Dynamic Thermal Clock-Skew Compensation. In: MICROELECTRONICS JOURNAL, vol. 45 n. 5, pp. 530-538. - ISSN 0959-8324
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno D. Shin; E. Macii; M. Poncino (2014)
Statistical Battery Models and Variation-Aware Battery Management. In: DAC-51: 51st Design Automation Conference. 74.1-74.6
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno D. Shin; M. Poncino; E. Macii (2014)
Thermal Management of Batteries Using a Hybrid Supercapacitor Architecture. In: Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014. pp. 1-6
Web of Science: 0 - Scopus: 6

Articolo di rivista Crepaldi M.; Grosso M.; Sassone A.; Gallinaro S.; Rinaudo S.; Poncino M.; Macii E.; Demarchi D. (2014)
A Top-down Constraint-driven Methodology for Smart System Design. In: IEEE CIRCUITS AND SYSTEMS MAGAZINE, vol. 14 n. 1, pp. 37-57. - ISSN 1531-636X [Disponibilità ristretta]
Web of Science: 6 - Scopus: 9
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Articolo in atti di convegno S. Miryala; A. Calimera; E. Macii; M. Poncino (2014)
Ultra Low-Power Computation via Graphene-Based Adiabatic Logic Gates. In: DSD-14: IEEE Euromicro Conference on Digital System Design. pp. 365-371
Web of Science: 6 - Scopus: 7

2013

Articolo in atti di convegno Petricca M.; Shin D.; Bocca A.; Macii A.; Macii E.; Poncino M. (2013)
An Automated Framework for Generating Variable-Accuracy Battery Models from Datasheet Information. In: ISLPED '13: International Symposium on Low power Electronics and Design. pp. 365-370
Web of Science: 12 - Scopus: 23

Articolo in atti di convegno Y. Kim; D. Shin; M. Petricca; S. Park; N. Chang; M. Poncino; (2013)
Computer-Aided Design of Electrical Energy Systems. In: ICCAD 2013: ACM/IEEE International Conference on CAD.
Web of Science: 2 - Scopus: 5

Articolo in atti di convegno Miryala S.; Calimera A.; Macii E.; Poncino M. (2013)
Delay model for reconfigurable logic gates based on graphene PN-junctions. In: GLSVLSI-13: ACM Great Lakes Symposium on VLSI, Paris, May. pp. 227-232
Scopus: 11

Articolo in atti di convegno Calimera A.; Macii E.; Poncino M. (2013)
Energy-optimal SRAM supply voltage scheduling under lifetime and error constraints. In: DAC-13: ACM Design Automation Conference, Austin, June. pp. 1-6
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Miryala S.; Calimera A.; Macii E.; Poncino M. (2013)
Exploration of different implementation styles for graphene-based reconfigurable gates. In: ICICDT-13: IEEE International Conference on IC Design & Technology, Pavia, May. pp. 21-24
Web of Science: 5 - Scopus: 9

Articolo in atti di convegno M. Petricca; D. Shin; A. Bocca; A. Macii; E. Macii; M. Poncino (2013)
A Framework with Temperature-Aware Accuracy Levels for Battery Modeling from Datasheets. In: PATMOS'13: Power and Timing Modeling, Optimization and Simulation. pp. 265-268
Web of Science: 2 - Scopus: 2

Articolo in atti di convegno Sassone A.; Petricca M.; Poncino M.; Macii E. (2013)
A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection. In: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013, Karlsruhe, Germany, 9-11 September, 2013. pp. 239-242

Articolo di rivista Calimera A.; Macii E.; Poncino M. (2013)
The Human Brain Project and Neuromorphic computing. In: FUNCTIONAL NEUROLOGY, vol. 28 n. 3, pp. 191-196. - ISSN 0393-5264
Scopus: 19

Articolo in atti di convegno Miryala S.; Calimera A.; Macii E.; Poncino M.; Bolzani L. (2013)
Investigating the behavior of physical defects in pn-junction based reconfigurable graphene devices. In: LATW-13: IEEE Latin American Test Workshop, Cordoba, April. pp. 1-6
Web of Science: 0 - Scopus: 3

Articolo di rivista Wei L.; Calimera A.; Macii A.; Macii E.; Nannarelli A.; Poncino M. (2013)
Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 32 n. 3, pp. 406-418. - ISSN 0278-0070 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 3
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Articolo di rivista Sassone A.; Liu W.; Calimera A.; Macii A.; Macii E.; Poncino M. (2013)
Modeling and Characterization of Thermally-Induced Skew on Clock Distribution Networks of Nanometric ICs. In: MICROELECTRONICS JOURNAL, vol. 44 n. 11, pp. 970-976. - ISSN 0959-8324
Web of Science: 5 - Scopus: 6

Articolo in atti di convegno Karimiyan Alidash H.; Calimera A.; Macii E.; Poncino M.; Macii A. (2013)
On-Chip NBTI and PBTI Tracking Through an All-Digital Aging Monitor Architecture. In: 22nd International Workshop, PATMOS, September 4-6, 2012, Newcastle upon Tyne, UK. pp. 155-165
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Miryala S.; Calimera A.; Macii E.; Poncino M. (2013)
Power Modeling and Characterization of Graphene-Based Logic Gates. In: PATMOS-13: IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation, Karlsruhe, September. pp. 223-226
Web of Science: 6 - Scopus: 7

Articolo in atti di convegno N. Bombieri; D. Drogoudis; G. Gangemi1; R. Gillon; Macii E.; Poncino M.; S. Rinaudo; F. Stefanni; D. Trachanis; M. Van Helvoort (2013)
SMAC: Smart Systems Co-Design. In: DSD'13: 16th Euromicro Conference on Digital System Design,. pp. 253-259
Web of Science: 2 - Scopus: 4

Articolo in atti di convegno D. Shin; M. Poncino; E. Macii; N. Chang (2013)
A Statistical Model of Cell-to-Cell Variation Li-ion Batteries for System-Level Design. In: ISLPED '13: International Symposium on Low power Electronics and Design. pp. 94-99
Web of Science: 2 - Scopus: 7

Articolo in atti di convegno Miryala S.; Montazeri M.; Calimera A.; Macii E.; Poncino M. (2013)
A Verilog-A Model for Reconfigurable Logic Gates Based on Graphene pn-Junctions. In: DATE-13: ACM/IEEE Design, Automation & Test in Europe, Dresden, March. pp. 877-880
Scopus: 12

2012

Articolo in atti di convegno H. Mahmood, M. Loghi, E. Macii, M. Poncino (2012)
Aging-Aware Caches with Graceful Degradation of Performance. In: VLSISoC'2012: IFIP/IEEE International Conference on Very Large Scale Integration. pp. 237-242
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Mahmood H., Loghi M., Macii E., Poncino M. (2012)
Application-Specific Memory Partitioning for Joint Energy and Lifetime Optimization. In: DATE 2012: Design, Automation & Test in Europe Conference & Exhibition. pp. 364-369
Scopus: 3

Articolo in atti di convegno M. Poncino (2012)
Concurrent Variability and Leakage Control through Adaptive Power-Gating. In: VARI'12: 3rd European Workshop on CMOS Variability.

Articolo di rivista Calimera A.; Macii A.; Macii E.; Poncino M. (2012)
Design Techniques and Architectures for Low-Leakage SRAMs. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, vol. 59 n. 9, pp. 1992-2007. - ISSN 1549-8328 [Disponibilità ristretta]
Web of Science: 11 - Scopus: 26
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Articolo di rivista Calimera A.; Macii E.; Poncino M. (2012)
Design Techniques for NBTI-Tolerant Power-Gating Architectures. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS, pp. 249-253. - ISSN 1549-7747
Web of Science: 9 - Scopus: 16

Articolo in atti di convegno Loghi M., Mahmood H, Calimera A., Poncino M., Macii E. (2012)
Energy-optimal caches with guaranteed lifetime. In: ISLPED '12; ACM/IEEE International Symposium on Low Power Electronics and Design, Redondo Beach, California, August, 2012. pp. 141-146
Scopus: 2

Articolo in atti di convegno Miryala S., Calimera A., Macii E., Poncino M. (2012)
IR-Drop Analysis of Graphene-Based Power Distribution Networks. In: DATE-12: IEEE Design Automation and Test in Europe, Dresden, Germany, March 2012. pp. 81-86
Scopus: 1

Articolo in atti di convegno Sassone A., Calimera A., Macii A.; Macii E., Poncino M., Goldman R., Melikyan V., Babayan E., Rinaudo S. (2012)
Investigating the Effects of Inverted Temperature Dependence (ITD) on Clock Distribution Networks. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012, Dresden, Germany, March 2012. pp. 165-166
Scopus: 5

Articolo in atti di convegno Tenace V.; Miryala S.; Calimera A.; Macii A.; Macii E.; Poncino M. (2012)
Layout Constrained Body-Biasing for Temperature Induced Clock-Skew Compensation. In: THERMINIC-12: IEEE International Workshop on Thermal Investigations of ICs and Systems, Budapest, September. pp. 1-6

Articolo in atti di convegno Y. Wang.Q. Xie, Y. Kim, N. Chang, M. Poncino, M. Pedram (2012)
Multiple-Source and Multiple-Destination Charge Migration in Hybrid Electrical Energy Storage Systems. In: DATE‘12: Design, Automation and Test in Europe. pp. 169-174
Scopus: 8

Articolo in atti di convegno Wei L., Miryala S., Tenace V., Calimera A., Macii E., Poncino M. (2012)
NBTI effects on tree-like clock distribution networks. In: GLSVLSI-12: IEEE/ACM Great Lakes symposium on VLSI, Salt Lake City, Utah, May 2012. pp. 279-282
Scopus: 2

Articolo di rivista Karimiyan H.; Calimera A.; Macii A.; Macii E.; Poncino M. (2012)
On-Chip PV Tracking Through an All-Digital Monitoring Architecture. In: IET CIRCUITS, DEVICES & SYSTEMS, vol. 6 n. 5, pp. 366-373. - ISSN 1751-858X
Web of Science: 2 - Scopus: 2

Articolo in atti di convegno A. Calimera, W. Liu, E. Macii, A. Nannarelli, M. Poncino (2012)
Power and Aging Characterization of Digital FIR Filters Architectures. In: 1st MEDIAN Workshop.

2011

Articolo in atti di convegno M. Poncino; Y. Kim; S. Park; Y. Wang; Q. Xie; N. Chang; M. Pedram (2011)
Balanced Reconfiguration of Storage Banks in a Hybrid Electrical Energy Storage System. In: 2011 IEEE/ACM International Conference on Computer-Aided Design. pp. 624-631
Web of Science: 10 - Scopus: 28

Articolo in atti di convegno A. Calimera,M. Loghi,E. Macii,M. Poncino (2011)
Buffering of frequent accesses for reduced cache aging. In: GLS-VLSI: ACM/IEEE Great Lakes Symposium on VLSI, 2011. pp. 295-300
Scopus: 0
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Articolo di rivista Sathanur A.; Benini L.; Macii A.; Macii E.; Poncino M. (2011)
Fast Computation of Discharge Current Upper Bounds for Clustered Power-Gating. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 19 n. 1, pp. 146-151. - ISSN 1063-8210
Web of Science: 2 - Scopus: 3

Articolo in atti di convegno A. Sassone, W. Liu, A. Calimera, A. Macii, E. Macii, M. Poncino (2011)
Modeling of thermally induced skew variations in clock distribution network. In: 17th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2011, Paris (FRA), 27-29 Sept. 2011. pp. 1-6
Scopus: 4
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Articolo in atti di convegno S. Rinaudo, G. Gangemi, A. Calimera, A. Macii, M. Poncino (2011)
Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems. In: 14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011, Grenoble (FRA), 14-18 March 2011. pp. 1127-1128 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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Articolo in atti di convegno A. Calimera,M. Loghi,E. Macii,M. Poncino (2011)
Partitioned cache architectures for reduced NBTI-induced aging. In: DATE: IEEE Design, Automation and Test in Europe, 2011. pp. 1-6
Web of Science: 3 - Scopus: 14
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Articolo di rivista L.D. Lima;A. Calimera;A. Macii;E. Macii;M. Poncino (2011)
Power Efficient Variability Compensation Through Clustered Tunable Power-Gating. In: IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, vol. 1 n. 3, pp. 242-253. - ISSN 2156-3357
Web of Science: 3 - Scopus: 5

Articolo di rivista Sathanur A.; Benini L; Macii A.; Macii E.; Poncino M. (2011)
Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 19 n. 3, pp. 469-482. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 7 - Scopus: 12
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Articolo in atti di convegno K. Lingasubramanian; A. Calimera; A. Macii; E. Macii; M. Poncino (2011)
Sub-row sleep transistor insertion for concurrent clock-gating and power-gating. In: 21st International Workshop on Power and Timing Modeling, Optimization, and Simulation, PATMOS 2011, Madrid (SP), September 26-29, 2011. pp. 214-225 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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Articolo in atti di convegno Andrea Acquaviva, Massimo Poncino, Marco Otella, Michele Sciolla (2011)
System Level Techniques to Improve Reliability in High Power Microcontrollers for Automotive Applications. In: DATE 2011, Design Automation and Test in Europe, Grenoble, FR, 14 - 18 March 2011.
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno H. Karimiyan;A. Calimera;A. Macii;E. Macii;M. Poncino (2011)
An on-chip all-digital PV-monitoring architecture for digital IPs. In: 21st International Workshop on Power and Timing Modeling, Optimization, and Simulation, PATMOS 2011, Madrid (SP), September 26-29, 2011. pp. 162-172 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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2010

Articolo in atti di convegno A. Calimera, M. Loghi, E. Macii, M. Poncino (2010)
Aging Effects of Leakage Optimizations for Caches. In: ACM/IEEE GLSVLSI-10: IEEE/ACM Great Lakes Symposium on VLSI, Providence, Rhode Island, May 2010. pp. 95-98
Scopus: 9
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Articolo in atti di convegno A. Calimera; E. Macii; M. Poncino (2010)
Analysis of NBTI-induced SNM degradation in power-gated SRAM cells. In: IEEE ISCAS-10: IEEE International Symposium on Circuits and Systems, May. pp. 785-788
Web of Science: 8 - Scopus: 17

Articolo di rivista Loghi M.; Golubeva O.; Macii E.; Poncino M. (2010)
Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Sub-Banking. In: IEEE TRANSACTIONS ON COMPUTERS, pp. 891-904. - ISSN 0018-9340 [Disponibilità ristretta]
Web of Science: 17 - Scopus: 22
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Articolo in atti di convegno Alberto Bonanno; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (2010)
Data-Driven Clock Gating for Digital Filters. In: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009), Delft (NL), September 9-11, 2009. pp. 96-105 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 4
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Articolo di rivista Calimera A; Bahar R. I; Macii E.; Poncino M. (2010)
Dual-Vt Assignment Policies in ITD-Aware Synthesis. In: MICROELECTRONICS JOURNAL, vol. 41, pp. 547-553. - ISSN 0959-8324
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno A. Calimera, M. Loghi, E. Macii, M. Poncino (2010)
Dynamic Indexing: Concurrent Leakage and Aging Optimizationfor Caches. In: ACM/IEEE ISLPED-10: ACM/IEEE International Symposium on Low Power Electronics and Design, Agosto. pp. 343-348
Scopus: 17

Articolo in atti di convegno M. Caldera, A. Calimera, A. Macii, E. Macii, M. Poncino (2010)
Minimizing temperature sensitivity of dual-Vt CMOS circuits using Simulated-Annealing on ISING-like models. In: THERMINIC-2010: IEEE International Workshop on Thermal Investigations of ICs and Systems, Barcelona (ESP), October. pp. 189-194 [Disponibilità ristretta]
Scopus: 0
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Articolo di rivista Calimera A.; Macii E.; Poncino M. (2010)
NBTI-Aware Clustered Power Gating. In: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 3-1-3-25. - ISSN 1084-4309
Web of Science: 10 - Scopus: 19

Articolo in atti di convegno Wei L.; Calimera A.; Nannarelli A.; Macii E.; Poncino M. (2010)
On-chip Thermal Modeling Based on SPICE Simulation. In: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2009, Delft (NL), September 9-11, 2009. pp. 66-75 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 15
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Articolo in atti di convegno Liu W., Nannarelli A., Calimera A., Macii E., Poncino M. (2010)
Post-placement temperature reduction techniques. In: DATE'10: IEEE Designa, Automation and Test in Europe, Dresden, March. pp. 634-637
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno A. Calimera, E. Macii, M. Poncino (2010)
Power-Gating: More Than Leakage Savings. In: IEEE PRIME-10: IEEE Conference on Ph.D. Research in Microelectronics and Electronics, Jul.. pp. 18-21
Scopus: 4
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Articolo in atti di convegno A. Calimera, A. Macii, E. Macii, S. Rinaudo, M. Poncino (2010)
THERMINATOR: Modeling, control and management of thermal effects in electronic circuits of the future. In: THERMINIC-10: International Workshop on Thermal Investigations of ICs and Systems, Barcelona, October. pp. 171-176 [Disponibilità ristretta]
Scopus: 2
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Articolo di rivista A. Calimera;R. Bahar;E. Macii;M. Poncino (2010)
Temperature-Insensitive Dual-Vth Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 18 n. 11, pp. 1608-1620. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 7 - Scopus: 13
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Articolo di rivista Chakraborty A., Duraisami K. Sithambaram P., Macii A., Macii E., Poncino M. (2010)
Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, vol. 57 n. 10, pp. 2741-2752. - ISSN 1549-8328 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 3
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Articolo in atti di convegno David Cuesta, Jose Ayala, Jose Hidalgo, Massimo Poncino, Andrea Acquaviva, Enrico Macii (2010)
Thermal-aware floorplanning exploration for 3D multi-core architectures. In: ACM Great Lakes Symposium on VLSI 2010.
Scopus: 7

Articolo in atti di convegno Andrea Acquaviva; Andrea Calimera; Alberto Macii; Massimo Poncino; Enrico Macii; Matteo Giaconia; Claudio Parrella (2010)
An integrated thermal estimation framework for industrial embedded platforms. In: ACM Great Lakes Symposium on VLSI 2010.
Scopus: 0

Articolo in atti di convegno Acquaviva A., Calimera A., Macii A., Poncino M., Macii E., Giaconia M., Parrella G. (2010)
An integrated thermal estimation framework for industrial embedded platforms. In: GLSVLSI'10: Great Lakes Symposium on VLSI, Providence, Rhode Island, May 2010. pp. 293-298
Scopus: 0

Articolo di rivista Benini L., Bonanno A., Bocca A., Macii A., Macii E., Nagel J.L., Piguet C., Poncino M. (2010)
A refinement methodology for clock gating optimization at layout level in digital circuits. In: JOURNAL OF LOW POWER ELECTRONICS, vol. 6 n. 1, pp. 44-55. - ISSN 1546-1998
Scopus: 1

2009

Articolo di rivista Calimera A.; Benini L; Macii A; Macii E; Poncino M (2009)
Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, vol. 56 n. 9, pp. 1979-1993. - ISSN 1549-8328 [Disponibilità ristretta]
Web of Science: 18 - Scopus: 24
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Articolo in atti di convegno Bolzani L.; Calimera A.; Macii A.; Macii E.; Poncino M. (2009)
Enabling concurrent clock and power gating in an industrial design flow. In: Design, Automation and Test in Europe Conference and Exhibition, DATE '09, Nice (FRA), 20-24 April 2009. pp. 334-339 [Disponibilità ristretta]
Web of Science: 12 - Scopus: 22
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Articolo in atti di convegno Ferri C; Bahar; I; Loghi M; Poncino M. (2009)
Energy-Optimal Synchronization Primitives for Single-Chip Multi-Processors. In: 19th ACM Great Lakes Symposium on VLSI, GLSVLSI '09, Boston (USA), May 10-12, 2009. pp. 141-144
Web of Science: 5 - Scopus: 8

Articolo di rivista Sathanur A; Benini L; Macii A; Macii E; Poncino M. (2009)
Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating. In: JOURNAL OF LOW POWER ELECTRONICS, vol. 5 n. 1, pp. 113-121. - ISSN 1546-1998
Scopus: 0

Articolo in atti di convegno Calimera A; Macii E.; Poncino M (2009)
NBTI-Aware Power Gating for Concurrent Leakage and Aging Optimization. In: ISLPED-09: ACM/IEEE International Symposium on Low-Power Electronics, San Francisco, CA, August 2009. pp. 127-132
Web of Science: 29 - Scopus: 60

Articolo in atti di convegno Calimera A; Macii E.; Poncino M (2009)
NBTI-Aware Sleep Transistor Design for Reliable Power-Gating. In: GLS-VLSI-09: ACM/IEEE 19th Great Lakes Symposium on VLSI, Boston, MA, May 2009. pp. 333-338
Web of Science: 8 - Scopus: 20

Articolo in atti di convegno Bozani L.; Calimera A.; Macii A.; Macii E.; Poncino M. (2009)
Placement-aware clustering for integrated clock and power gating. In: IEEE International Symposium on Circuits and Systems, ISCAS 2009, Taipei, Taiwan, 24-27 May 2009. pp. 1723-1726 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 2
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Articolo in atti di convegno Upasani G., Calimera A., Macii A., Macii E., Poncino M. (2009)
Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering. In: 19th International Workshop, PATMOS 2009, Delft (NLD), September 9-11, 2009,. pp. 227-236 [Disponibilità ristretta]
Scopus: 0
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Articolo di rivista Azzoni P; Loghi M; Poncino M. (2009)
Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 17 n. 5, pp. 728-732. - ISSN 1063-8210
Web of Science: 2 - Scopus: 4

Articolo in atti di convegno Duraisami K; Macii E; Poncino M. (2009)
Using Soft-Edge Flip-Flops to Compensate NBTI-induced Delay Degradation. In: GLSVLSI '09: ACM/IEEE 18th Great Lakes symposium on VLSI.
Web of Science: 2 - Scopus: 8

Articolo di rivista Fummi F; Loghi M; Poncino M.; Pravadelli G (2009)
A cosimulation methodology for HW/SW validation and performance estimation. In: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, vol. 14 n. 2, 23-1-23-32. - ISSN 1084-4309 [Disponibilità ristretta]
Web of Science: 4 - Scopus: 15
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2008

Articolo di rivista Chakraborty A.; Duraisami K.; Visweswara Sathanur A.; Sithambaram P.; Macii A.; Macii E.; Poncino M. (2008)
Dynamic thermal clock skew compensation using tunable delay buffers. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 16 n. 6, pp. 639-649. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 24 - Scopus: 36
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Articolo in atti di convegno Duraisami K; Poncino M; Macii E. (2008)
Energy Efficiency Bounds of Pulse-Encoded Buses. In: GLS-VLSI-08: ACM/IEEE 18th Great Lakes Symposium on VLSI, Orlando, FL. pp. 183-188
Scopus: 0

Articolo in atti di convegno Calimera A.; Bahar R.I; Macii E; Poncino M (2008)
Ensuring temperature-insensitivity of dual-Vt designs through ITD-aware synthesis. In: Worshop on THERMal INvestigations of ICs and Systems, Rome, 24-26 September 2008. pp. 31-36
Web of Science: 1 - Scopus: 1

Articolo di rivista Macii A.; Chakraborty A; Duraisami K; Sathanur A; Sithambaram P; Macii E; Poncino M (2008)
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. In: INTEGRATION, vol. 41 n. 1, pp. 2-8. - ISSN 0167-9260
Web of Science: 4 - Scopus: 5

Articolo in atti di convegno Bolzani L; Calimera A; Macii A; Macii E.; Poncino M (2008)
Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. In: DSD '08, 11th EUROMICRO Conference on, Parma, Italy, 3-5 Sept. 2008. pp. 298-303
Web of Science: 6 - Scopus: 16

Articolo in atti di convegno Visweswara Sathanur A.; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (2008)
Multiple power-gating domain (multi-VGND)architecture for improved leakage power reduction. In: ISLPED-08:International Symposium on Low Power Electronics and Design, Bangalore, India. pp. 51-56
Scopus: 7

Articolo in atti di convegno A. Sathanur; A. Calimera; A. Pullini; L. Benini; A. Macii; E. Macii; Poncino M. (2008)
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits. In: ISCAS 2008, Seattle, WA, 18-21 May 2008.
Web of Science: 2 - Scopus: 4

Articolo in atti di convegno Sathanur A; Pullini A; Benini L; Macii A.; Macii E; Poncino M (2008)
Optimal sleep transistor synthesis under timing and area constraints. In: GLSVLSI '08: 18th ACM Great Lakes symposium on VLSI, Orlando, Florida, May 04-06, 2008. pp. 177-182
Scopus: 10

Articolo in atti di convegno Calimera A; Bahar R. I; Macii E.; Poncino M (2008)
Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits. In: ISLPED-08: ACM/IEEE International Symposium on Low Power Electronics and Design, Bangalore, India. pp. 217-220
Scopus: 13

Articolo in atti di convegno Sathanur A; Pullini A; Benini L; Macii A.; Macii E; Poncino M (2008)
A Scalable Algorithmic Framework for Row-Based Power-Gating. In: DATE '08. Design, Automation and Test in Europe, Munich (DEU), 10-14 March 2008. pp. 379-384
Web of Science: 0 - Scopus: 3

Articolo in atti di convegno Calimera A; Bahar R. I; Macii E.; Poncino M (2008)
Temperature-Insensitive Synthesis Using Multi-Vt Libraries. In: GLS-VLSI-08: ACM/IEEE 18th Great Lakes Symposium on VLSI, Orlando, FL. pp. 5-10
Scopus: 19

Articolo in atti di convegno Sathanur A; Benini L; Macii A.; Macii E; Poncino M (2008)
Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating. In: PATMOS-08: IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation, Lisboa, Portugal, September 2008. pp. 42-51
Scopus: 0

Articolo di rivista Calimera A; Duraisami K; Sathanur A; Sithambaram P; Bahar I; Macii A; Macii E.; Poncino M (2008)
Thermal-Aware Design Techniques for Nanometer CMOS Circuits. In: JOURNAL OF LOW POWER ELECTRONICS, vol. 3, pp. 374-384. - ISSN 1546-1998
Scopus: 1

2007

Articolo in atti di convegno Golubeva O; Loghi M.; Poncino M; Macii E (2007)
Architectural leakage-aware management of partitioned scratchpad memories. In: IEEE Design Automation and Test in Europe Conference (DATE), Nice, France, April 16-20, 2007. pp. 1665-1670
Web of Science: 9 - Scopus: 17

Articolo in atti di convegno Duraisami K; Sithambaram P; Sathanur A; Macii A.; Macii E; Poncino M (2007)
Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. In: ISCAS-07: IEEE International Conference on Circuits and Systems, New Orleans, Louisiana, 27-30 May 2007. pp. 1061-1064
Web of Science: 2 - Scopus: 3

Articolo in atti di convegno Calimera A.; Macii A.; Pullini A.; Sathanur A.; Benini L.; Macii E.; Poncino M. (2007)
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. In: GLSVLSI-07: ACM/IEEE 17th Great Lakes Symposium on VLSI, Stresa, Marzo. pp. 501-504
Web of Science: 6 - Scopus: 14

Articolo in atti di convegno Sathanur A; Calimera A; Benini L; Macii A.; Macii E; Poncino M (2007)
Efficient Computation of Discharge Current Upper Bounds for Clustered Sleep Transistor Sizing. In: DATE-07: IEEE Design Automation and Test in Europe, Nizza, Francia, 16-20 April 2007. pp. 1-6
Web of Science: 1 - Scopus: 19

Articolo di rivista Poletti F; Poggiali A; Bertozzi D; Benini L; Marchal P; Loghi M.; Poncino M (2007)
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. In: IEEE TRANSACTIONS ON COMPUTERS, vol. 56 n. 5, pp. 606-621. - ISSN 0018-9340 [Disponibilità ristretta]
Web of Science: 10 - Scopus: 24
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Articolo in atti di convegno Loghi M.; Golubeva O; Poncino M; Macii E (2007)
Locality-driven architectural cache sub-banking for leakage energy reduction. In: International Symposium on Low Power Electronics and Design (ISLPED), Portland, OR, USA, August 27-29 2007. pp. 274-279
Web of Science: 2 - Scopus: 3

Articolo in atti di convegno Golubeva O; Loghi M.; Poncino M (2007)
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors. In: ACM Great Lakes symposium on VLSI (GLSVLSI), Stresa-Lago Maggiore, Italy, March 11-13, 2007. pp. 489-492
Web of Science: 2 - Scopus: 5

Articolo di rivista Loghi M; Benini L; Poncino M. (2007)
Power macromodeling of MPSoC message passing primitives. In: ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, vol. 6 n. 4, 31/1-31/22. - ISSN 1539-9087
Web of Science: 3 - Scopus: 9

Articolo di rivista Fummi F; Loghi M.; Perbellini G; Poncino M (2007)
SystemC co-simulation for core-based embedded systems. In: DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, vol. 11 n. 2-3, pp. 141-166. - ISSN 0929-5585
Web of Science: 4 - Scopus: 10

Articolo in atti di convegno Sathanur A; Pullini A; Benini L; Macii A.; Macii E; Poncino M (2007)
Timing-driven row-based power gating. In: ISLPED-07: ACM/IEEE International Symposium on Low PowerElectronics and Design, Portland, Oregon, Agosto 2007. pp. 104-109
Web of Science: 14 - Scopus: 27

2006

Articolo di rivista Loghi M; Benini L; Poncino M. (2006)
Cache coherence tradeoffs in shared-memory MPSoCs. In: ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, vol. 5 n. 2. - ISSN 1539-9087
Web of Science: 4 - Scopus: 33

Articolo in atti di convegno Ashutosh Chakraborty; Karthik Duraisami; Visweswara Sathanur A.; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (2006)
Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. In: PATMOS-06: IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation, Montpellier, France. pp. 214-224
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno Chakraborty A; Duraisami K; Sithambaram P; Sathanur A; Macii A.; Macii E; Poncino M (2006)
Dynamic Thermal Clock Skew Compensation using Tunable Delay Buffers. In: ISLPED-06: ACM/IEEE International Symposium on Low Power Electronics and Design, Tegernsee, Germany. pp. 162-167
Web of Science: 7 - Scopus: 20

Articolo di rivista Patel K; Poncino M.; Benini L; Macii E (2006)
Energy-Efficient Value Based Selective Refresh for Embedded DRAMS. In: JOURNAL OF LOW POWER ELECTRONICS, vol. 2 n. 1, pp. 70-79. - ISSN 1546-1998
Web of Science: 3

Articolo in atti di convegno Fummi F; Perbellini G; Loghi M.; Poncino M (2006)
ISS-centric modular HW/SW co-simulation. In: ACM Great Lakes symposium on VLSI (GLSVLSI), Philadelphia, PA, USA, April 30 - May 1, 2006. pp. 31-36
Scopus: 14

Articolo in atti di convegno Chakraborty A; Duraisami K; Sathanur A; Sithambaram P; Macii A.; Macii E; Poncino M (2006)
Implications of Ultra Low-Voltage Devices on Design Techniques for Controlling Leakage in NanoCMOS Circuits. In: ISCAS-06: IEEE International Conference on Circuits and Systems, Kos Island, Greece. pp. 33-36
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Nurrachmat A; Macii E.; Poncino M (2006)
Low-Energy Pixel Approximation for DVI-Based LCD Interfaces. In: ISCAS-06: IEEE International Conference on Circuits and Systems, Kos Island, Greece. pp. 4337-4440
Web of Science: 0 - Scopus: 0

Articolo di rivista Poncino M; Macii E. (2006)
Low-Energy RGB Color Approximation for Digital LCD Interfaces. In: IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, vol. 52 n. 3, pp. 1004-1012. - ISSN 0098-3063
Web of Science: 4 - Scopus: 3

Capitolo di libro Macii E.; Mehra R; Poncino M (2006)
Micro-Architectural Power Estimation and Optimization. In: Electronic Design Automation for Integrated Circuits Handbook / SCHEFFER L.; LAVAGNO L.; MARTIN G. CRC Press, BOCAN RATON, 13:1-13:34. ISBN 9780849330964

Articolo di rivista Patel K; Benini L; Macii E.; Poncino M (2006)
Reducing conflict misses by application-specific reconfigurable indexing. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 25 n. 12, pp. 2626-2637. - ISSN 0278-0070
Web of Science: 3 - Scopus: 5

Articolo in atti di convegno Patel K; Benini L; Macii E.; Poncino M (2006)
STV-Cache: A Leakage Energy-Efficient Architecture for Data Caches. In: GLS-VLSI-06: ACM/IEEE Great Lakes Symposium on VLSI, Philadelphia, Pennsylvania. pp. 404-409
Scopus: 3

Articolo in atti di convegno Loghi M.; Poncino M; Benini L (2006)
Synchronization-driven dynamic speed scaling for MPSoCs. In: International Symposium on Low Power Electronics and Design (ISLPED), Tegernsee, Bavaria, Germany, October 4-6, 2006. pp. 346-349
Web of Science: 0 - Scopus: 2

Capitolo di libro Chang N; Macii E.; Poncino M; Tiwari V (2006)
System-Level Dynamic Power Management. In: Electronic Design Automation for Integrated Circuits Handbook / SCHEFFER L.; LAVAGNO L.; MARTIN G. CRC Press, BOCAN RATON, 7:1-7:19. ISBN 9780849330964

Articolo in atti di convegno Chakraborty A; Sithambaram P; Duraisami K; Poncino M; Macii A.; Macii E (2006)
Thermal Resilient Bounded-Skew Clock-Tree Optimization Methodology. In: DATE-06: IEEE Design Automation and Test in Europe, Munich, Germany. pp. 832-837
Web of Science: 0 - Scopus: 13

2005

Articolo di rivista Salerno S; Macii E.; Poncino M (2005)
Energy-Efficient Bus Encoding for LCD Digital Display Interfaces. In: IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, vol. 51 n. 2, pp. 624-634. - ISSN 0098-3063 [Disponibilità ristretta]
Web of Science: 4 - Scopus: 5
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Articolo in atti di convegno Nurrachmat A; Salerno A; Macii E.; Poncino M (2005)
Energy-Efficient Color Approximation for Digital LCD Interfaces. In: ICCD-05: IEEE International Conference on Computer Design, San Jose, California. pp. 81-86
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno A. Chakraborty; Macii E.; Poncino M. (2005)
Energy-Efficient Encoding for HDCP Protected Digital LCD Interfaces. In: ISSCS'05: IEEE Intenational Symposium on Signals, Circuits and Systems.
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Chakraborty A; Macii A.; Macii E; Poncino M; Pandini D (2005)
Evaluating regularity extraction in logic synthesis. In: ISSCS 2005: International Symposium on Signals, Circuits and Systems, 2005, Iasi, Romania, Luglio 2005. pp. 641-644
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Chakraborty A; Macii E.; Poncino M (2005)
Exploiting Cross-Channel Correlation for Energy-Efficient LCD Bus Encoding. In: 15th International Workshop, PATMOS 2005, Leuven, September 21-23, 2005. pp. 297-307
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Loghi M; Poncino M. (2005)
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions. In: DATE'05: Design, Automation and Test in Europe.
Web of Science: 4 - Scopus: 11

Articolo in atti di convegno Patel K; Macii E.; Poncino M (2005)
Frame Buffer Energy Optimization by Pixel Prediction. In: ICCD-05: IEEE International Conference on Computer Design, San Jose, California. pp. 98-101
Web of Science: 4 - Scopus: 11

Capitolo di libro Macii E.; Poncino M (2005)
Power Macro-Models for High-Level Power Estimation. In: Low Power Electronics Design / PIGUET C. CRC Press, BOCA RATON, 39:1-39:18. ISBN 9780849319419

Articolo di rivista Bruno M; Macii A.; Poncino M. (2005)
RTL power estimation in an HDL-based design flow. In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES, vol. 152, pp. 723-730. - ISSN 1350-2387
Web of Science: 1 - Scopus: 2

Articolo in atti di convegno Loghi M.; Azzoni P; Poncino M (2005)
Tag Overflow Buffering: An Energy-Efficient Cache Architecture. In: IEEE Design Automation and Test in Europe Conference (DATE), Munich, Germany, 7-11 March 2005. pp. 520-525
Web of Science: 2 - Scopus: 4

Articolo in atti di convegno Poncino M.; M. Loghi; S. Martini; M. Monguzzi; G. Perbellini; Fummi F (2005)
Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation. In: DATE'05: Design, Automation and Test in Europe.
Web of Science: 6 - Scopus: 14

Articolo in atti di convegno Patel K; Macii E.; Poncino M (2005)
Zero Clustering: An Approach to Extend Zero Compression to Instruction Caches. In: GLS-VLSI-05: ACM/IEEE Great Lakes Symposium on VLSI, Chicago, Illinois. pp. 56-59
Scopus: 0

2004

Articolo in atti di convegno Loghi M.; Poncino M; Benini L (2004)
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor. In: IEEE International Conference on Computer Design (ICCD), San Jose, CA, USA, 11-13 October 2004. pp. 393-396
Web of Science: 1 - Scopus: 2

Articolo in atti di convegno Salerno S; Macii E.; Poncino M (2004)
Cross-Talk Energy Reduction by Temporal Shielding. In: ISCAS-04: IEEE International Conference on Circuits and Systems, Vancouver, British Columbia. pp. 749-752

Articolo in atti di convegno M. Loghi; L. Benini; Poncino M. (2004)
"Cycle-Accurate Power Analysis for Multiprocessor Systems-on-a-Chip". In: GLS-VLSI'04: IEEE 13th Great Lakes Symposium on VLSI.
Scopus: 37

Articolo in atti di convegno M. Loghi; L. Benini; Poncino M. (2004)
"Empirical Macromodeling of Operating System Communication Primitives". In: International Workshop on Probabilistic Analysis Techniques for Real-Time and Embedded Systems.

Articolo in atti di convegno A. Bocca; S. Salerno; E. Macii; Poncino M. (2004)
Energy-Efficient Bus Encoding for LCD Displays. In: GLS-VLSI'04: IEEE 13th Great Lakes Symposium on VLSI. pp. 240-243
Web of Science: 9

Capitolo di libro Macii A.; K. Patel; M. Poncino (2004)
Energy-Efficient Shared Memory Architectures for Multi-processor System-on-Chip. In: Ultra Low-Power electronics and Design. Kluwer Academic Publishers, DORDRECHT, pp. 84-102. ISBN 9781402080753

Articolo in atti di convegno Patel K; Macii E.; Poncino M (2004)
Energy-Performance Trade-Offs for the Shared Memory in Multi-Processor Systems-on-Chip. In: ISCAS-04: IEEE International Conference on Circuits and Systems, Vancouver, British Columbia. pp. 361-364

Articolo in atti di convegno F. Fummi; S. Martini; G. Perbellini; Poncino M.; F. Ricciato; M. Turolla (2004)
"Heterogeneous Co-Simulation of Networked Embedded Systems". In: DATE'04: Design Automation and Test in Europe.
Web of Science: 7 - Scopus: 10

Articolo in atti di convegno S. Salerno; E. Macii; Poncino M. (2004)
A Low-Power Encoding Scheme for GigaByte Video Interfaces. In: 14th International Workshop, PATMOS 2004, Santorini, September 15-17, 200. pp. 58-68
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno F. Fummi; S. Martini; M. Monguzzi; G. Perbellini; Poncino M. (2004)
"Modeling and Analysis of Heterogeneous Industrial Networks Architectures". In: DATE'04: Design Automation and Test in Europe.
Web of Science: 1 - Scopus: 1

Articolo in atti di convegno F. Fummi; S. Martini; G. Perbellini; Poncino M. (2004)
"Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC". In: DATE'04: Design Automation and Test in Europe.
Web of Science: 16 - Scopus: 34

Articolo in atti di convegno Patel K; Benini L; Macii E.; Poncino M (2004)
Reducing Cache Misses by Application-Specific Re-Configurable Indexing. In: ICCAD-04: ACM/IEEE International Conference on Computer-Aided Design, San Jose, California. pp. 125-130
Web of Science: 4 - Scopus: 10

Articolo in atti di convegno F. Fummi; S. Martini; M. Monguzzi; G. Perbellini; Poncino M. (2004)
"Software/Network Co-Simulation of Heterogeneous Industrial Networks Architectures". In: ICCD'04: International Conference on Computer Design.
Scopus: 5

Articolo in atti di convegno Patel K; Macii E.; Poncino M (2004)
Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient MultiProcessor SoCs. In: DATE-04: IEEE Design Automation and Test in Europe, Paris, France. pp. 700-701
Scopus: 6

2003

Capitolo di libro Benini L.; Poncino M. (2003)
Ambient Intelligence: A Computational Perspective. In: Ambient Intelligence: Impact on Embedded-system Design / BASTEN T.; DE GROOT H.; G. GEILEN. kluwer academic publishers.

Articolo in atti di convegno Macii E.; Poncino M; Salerno S (2003)
Combining Wire Swapping and Spacing for Low-Power Deep-Submicron Buses. In: GLS-VLSI-03: IEEE/ACM Great Lakes Symposium on VLSI,, Washington, DC. pp. 198-202
Scopus: 33

Articolo di rivista Benini L.; Macii A.; Poncino M. (2003)
Energy-Aware Design of Embedded Memories: A Survey of Technologies, Architectures and Optimization Techniques. In: ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, vol. 2, pp. 5-32. - ISSN 1539-9087
Scopus: 35

Articolo in atti di convegno L. Benini; A. Galati; Macii A.; E. Macii; M. Poncino (2003)
Energy-Efficient Data Scrambling for Secure Communication in Crypto-Processors. In: ISLPED-03: ACM/IEEE 2003 International Symposium on Low Power Electronics and Design, Seoul, Korea, Agosto 2003. pp. 26-29

Articolo in atti di convegno L. Benini; A. Galati; A. Macii; E. Macii; Poncino M. (2003)
"Energy-Efficient Data Scrambling on Memory-Processor Interfaces". In: ISLPED'03: ACM International Symposium on Low Power Electronics and Design.
Web of Science: 2 - Scopus: 12

Articolo in atti di convegno L. Benini; Macii A.; E. Macii; M. Poncino, Omerbegovic E.,Pro F. (2003)
Energy-aware design techniques for differential power analysis protection. In: DAC-40: ACM/IEEE Design Automation Conference, Anaheim, California, Giugno 2003. pp. 36-41
Web of Science: 35 - Scopus: 53

Articolo in atti di convegno N. Drago; F. Fummi; Poncino M.; M. Monguzzi; G. Perbellini (2003)
"Estimation of Bus Performance for a Tuplespace in an Embedded Architecture". In: DATE'03: Design Automation and Test in Europe.
Web of Science: 1 - Scopus: 3

Articolo di rivista Benini L.; Bruni D.; Macii A.; Macii E.; Poncino M. (2003)
Extending Lifetime of Multi-Battery Mobile Systems by Discharge Current Steering. In: IEEE TRANSACTIONS ON COMPUTERS, vol. 53. - ISSN 0018-9340

Articolo in atti di convegno Macii A; Macii E.; Poncino M (2003)
Improving the Efficiency of Memory Partitioning by Address Clustering. In: DATE-03: IEEE Design Automation and Test in Europe, Munich, Germany. pp. 18-23
Web of Science: 10 - Scopus: 15

Articolo in atti di convegno Macii A.; E. Macii; M. Poncino (2003)
Increasing the Locality of Memory Access Patterns by Low-Overhead Hardware Address Relocation. In: ISCAS-03: IEEE International Symposium on Circuits and Systems, Bangkok, Thailandia, Maggio 2003. pp. 385-388
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Benini L; Macii A; Macii E.; Omerbegovic E; Poncino M; Pro F (2003)
A Novel Architecture for Power Maskable Arithmethic Units. In: GLS-VLSI-03: IEEE/ACM Great Lakes Symposium on VLSI,, Washington, DC. pp. 136-140

Articolo di rivista Benini L.; Macii A.; Macii E.; Poncino M.; Scarsi R. (2003)
Scheduling Battery Usage in Mobile Systems. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 11-6, pp. 1136-1143. - ISSN 1063-8210
Web of Science: 15 - Scopus: 21

Articolo di rivista M. Bruno; Macii A.; M. Poncino (2003)
A Statistic Power Model for Non-synthetic RTL Operators. In: LECTURE NOTES IN COMPUTER SCIENCE, pp. 208-218. - ISSN 0302-9743

Articolo di rivista Benini L; Bertozzi D.; Bruni D.; Drago N.; Fummi F.; Poncino M. (2003)
SystemC Co-Simulation and Emulation of Multi-Processor Systems-on-Chip. In: COMPUTER, vol. 4. - ISSN 0018-9162

Articolo in atti di convegno A. Fin; F. Fummi; Poncino M.; G. Pravadelli (2003)
"A SystemC-based Framework for Properties Incompleteness Evaluation". In: MTV'03: IEEE International Workshop on Microprocessor Test and Verification.
Web of Science: 1 - Scopus: 1

Articolo in atti di convegno F. Gallo; F. Fummi; S. Martini; G. Perbellini; Poncino M.; F. Ricciato (2003)
A timing-accurate modeling and simulation environment for networked embedded systems. In: DAC-40: 40th Design Automation Conference.
Web of Science: 15 - Scopus: 27

2002

Articolo in atti di convegno Benini L; Macii A; Macii E.; Poncino M (2002)
Discharge Current Steering for Battery Lifetime Optimization. In: ISLPED-02: ACM/IEEE International Symposium on Low-Power Electronics and Design, Monterey, CA. pp. 118-123
Web of Science: 3 - Scopus: 9

Articolo in atti di convegno M. Donno; L. Macchiarulo; Macii A.; E. Macii; M. Poncino (2002)
Enhanced Clustered Voltage Scaling for Low Power. In: GLS-VLSI-02: IEEE/ACM 12th Great Lakes Symposium on VLSI, New York, Aprile 2002. pp. 18-23
Scopus: 10

Articolo di rivista Benini L.; Macchiarulo L.; Macii A.; Poncino M. (2002)
Layout-Driven Memory Synthesis for Embedded Systems-on-Chip. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10-2, pp. 96-105. - ISSN 1063-8210
Web of Science: 36 - Scopus: 53

Libro Benini L.; Macii A.; Poncino M. (2002)
Memory Design Techniques for Low-Energy Embedded Systems. Kluwer academic Publisher, DORDRECHT. ISBN 9780792376903

Articolo di rivista Benini L.; Macii A.; Macii E.; Poncino M. (2002)
Minimizing Memory Access Energy in Embedded Systems by Selective Instruction Compression. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10, pp. 521-531. - ISSN 1063-8210
Web of Science: 11 - Scopus: 12

Articolo in atti di convegno N. Drago; F. Fummi; Poncino M. (2002)
"Modeling network embedded systems with NS-2 and systemC". In: ICCSC'02: 1st IEEE International Conference on Circuits and Systems for Communications.
Web of Science: 3 - Scopus: 5

Articolo in atti di convegno L. Benini; D. Bruni; N. Drago; F. Fummi; Poncino M. (2002)
"Virtual In-Circuit Emulation for Timing Accurate System Prototyping". In: ASIC/SOC'02: 15th IEEE International ASIC/SOC Conference.
Web of Science: 1 - Scopus: 10

Articolo in atti di convegno Macchiarulo L; Macii E.; Poncino M (2002)
Wire Placement for Crosstalk Energy Minimization in Address Buses. In: DATE-02: IEEE Design Automation and Test in Europe, Paris, France. pp. 158-162
Web of Science: 35 - Scopus: 50

2001

Articolo in atti di convegno Castelli G; Macii A; Macii E.; Poncino M (2001)
Current-Controlled Policies for Battery-Driven Dynamic Power Management. In: ICECS-01: IEEE International Conference on Electronics, Circuits and Systems, Dragonara Resort, Malta. pp. 959-962
Web of Science: 1 - Scopus: 9

Articolo di rivista Benini L.; Castelli G.; Macii A.; Macii E.; Poncino M.; Scarsi R. (2001)
Discrete-time battery models for system-level low-power design. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9 n. 5, pp. 630-640. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 67 - Scopus: 94
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Articolo in atti di convegno Benini L; Castelli G; Macii A; Macii E.; Poncino M; Scarsi R (2001)
Extending Lifetime of Portable Systems by Battery Scheduling. In: DATE-01: IEEE 2001 Design Automation and Test in Europe, Munich, Germany. pp. 197-201
Web of Science: 35 - Scopus: 51

Articolo in atti di convegno Anton C; Colonescu I; Macii E.; Poncino M (2001)
Fast Characterization of RTL Power Macromodels. In: ICECS-01: IEEE International Conference on Electronics, Circuits and Systems, Dragonara Resort, Malta. pp. 1591-1594
Web of Science: 12 - Scopus: 16

Articolo in atti di convegno L. Benini; L. Macchiarulo; Macii A.; E. Macii; M. Poncino (2001)
From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip. In: DAC-38: ACM/IEEE Design Automation Conference, Las Vegas, Nevada, Giugno 2001. pp. 784-789
Web of Science: 6 - Scopus: 7

Articolo in atti di convegno Macchiarulo L; Macii E.; Poncino M (2001)
Low-Energy Encoding for Deep-Submicron Address Buses. In: ACM/IEEE International Symposium on Low-Power Electronics and Design, Huntington Beach, CA. pp. 176-181
Web of Science: 15 - Scopus: 40

Articolo di rivista Bogliolo A.; Corgnati R.; Macii E.; Poncino M. (2001)
Parameterized RTL Power Models for Combinational Soft Macros. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9. - ISSN 1063-8210

Articolo in atti di convegno Bogliolo A; Colonescu I; Corgnati R; Macii E.; Poncino M (2001)
An RTL Power Estimation Tool with On-Line Model Building Capabilities. In: PATMOS-01: IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation, Yverdon, Switzerland. 2.3.1-2.3.10

Articolo di rivista Macii A.; Macii E.; Poncino M.; Scarsi R. (2001)
Stream Synthesis for Efficient Power Simulation Based on SpectralTransforms. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9, pp. 417-426. - ISSN 1063-8210
Web of Science: 3 - Scopus: 4

Articolo di rivista Benini L.; De Micheli G.; Lioy A.; Macii E.; Odasso G.; Poncino M. (2001)
Synthesis of Power-Managed Sequential Components Based on Computational Kernel Extraction. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 20 n. 9, pp. 1118-1131. - ISSN 0278-0070
Web of Science: 9 - Scopus: 9

2000

Articolo in atti di convegno L. Benini; Macii A.; E. Macii; M. Poncino (2000)
Analysis of Energy Dissipation in the Memory Hierarchy of Embedded Systems: A Case Study. In: MELECON-00: IEEE Mediterranean Electrotechnical Conference, Cyprus, Maggio 2000. pp. 236-239
Web of Science: 0 - Scopus: 1

Articolo di rivista Benini L.; Macii A.; Macii E.; Poncino M.; Scarsi R. (2000)
Architectures and Synthesis Algorithms for Power-Efficient Bus Interfaces. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 19-9, pp. 969-980. - ISSN 0278-0070
Web of Science: 48 - Scopus: 55

Articolo in atti di convegno L. Benini; G. Castelli; Macii A.; E. Macii; M. Poncino; R. Scarsi (2000)
A Discrete-Time Battery Model for High-Level Power Estimation. In: DATE-00: IEEE Design Automation and Test in Europe, Paris, France, Marzo 2000. pp. 35-39
Scopus: 90

Articolo di rivista Benini L.; De Micheli G.; Macii A.; Macii E.; Poncino M. (2000)
Glitch power minimization by selective gate freezing. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 8 n. 3, pp. 287-298. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 19 - Scopus: 28
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Articolo di rivista Benini L.; Macii A.; Macii E.; Poncino M. (2000)
Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation. In: IEEE DESIGN & TEST OF COMPUTERS, vol. 17, pp. 74-85. - ISSN 0740-7475
Web of Science: 35 - Scopus: 59

Articolo in atti di convegno Benini L; Castelli G; Macii A; Macii E.; Poncino M; Scarsi R (2000)
Life-Time Analysis of Batteries used in Portable Digital Systems. In: MELECON-00: 11th IEEE Mediterranean Electrotechnical Conference, Nicosia, Cyprus. pp. 240-243
Web of Science: 0 - Scopus: 3

Articolo di rivista Benini L.; De Micheli; Macii E.; Poncino M.; Scarsi R. (2000)
A Multi-Level Engine for Fast Power Simulation of Realistic Input Streams. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. CAD-19, pp. 470-486. - ISSN 0278-0070
Web of Science: 1 - Scopus: 1

Articolo in atti di convegno Rossello M; Zafalon R; Macii E.; Poncino M (2000)
Power Macromodeling for an High-Quality RT-Level Power Estimation. In: ISQED-00: IEEE International Symposium on Quality of Electronic Design, San Jose, CA. pp. 59-63
Scopus: 7

Articolo in atti di convegno Bogliolo A; Macii E.; Mihailovici V; Poncino M (2000)
Power Models for Semi-Autonomous RTL Macros. In: Power and Timing Modeling, Optimization and Simulation 10th International Workshop,PATMOS 2000, Göttingen (DEU), September 13–15, 2000. pp. 14-23 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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Articolo in atti di convegno Benini L; Ferrero M; Macii A; Macii E.; Poncino M (2000)
Power/Performance Trade-Offs in the Implementation of Digital Filters: A Case Study. In: MELECON-00: 11th IEEE Mediterranean Electrotechnical Conference, Nicosia, Cyprus. pp. 595-598
Scopus: 0

Articolo in atti di convegno Anton C; Bogliolo A.; Civera P; Colonescu I; Macii E.; Poncino M (2000)
RTL Estimation of Steering Logic Power. In: Power and Timing Modeling, Optimization and Simulation 10th International Workshop, PATMOS 2000, Göttingen (DEU), September 13–15, 2000. pp. 36-45 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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Articolo in atti di convegno L. Benini; Macii A.; M. Poncino (2000)
A Recursive Algorithm for Low-Power Memory Partitioning. In: ISLPED-00: ACM/IEEE International Symposium on Low Power Electronics and Design, Rapallo/Portofino Coast, Luglio 2000. pp. 78-83
Web of Science: 9

Articolo in atti di convegno Benini L; Bogliolo A; Macii E.; Poncino M; Surmei M (2000)
Regression-Based RTL Power Models for Controllers. In: GLS-VLSI-00: IEEE/ACM 10th Great Lakes Symposium on VLSI, Evanston, IL. pp. 147-152
Scopus: 1

Articolo in atti di convegno L. Benini; M. Ferrero; A. Macii; E. Macii; M. Poncino (2000)
Supporting system-level power exploration for DSP applications. In: 10th Great Lakes Symposium on VLSI, Evanston ILL (USA), March 2-4, 2000. pp. 17-22 [Disponibilità ristretta]
Scopus: 1
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Articolo di rivista Ferrandi F.; Fummi F.; Macii E.; Poncino M.; Sciuto D. (2000)
Symbolic Optimization of FSM Networks Based on Redundancy Identification and Removal. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 19. - ISSN 0278-0070

Articolo in atti di convegno L. Benini; A. Macii; E. Macii; M. Poncino (2000)
Synthesis of application-specific memories for power optimization in embedded systems. In: DAC-37: ACM/IEEE Design Automation Conference, Los Angeles CA (USA), June 5-9, 2000. pp. 300-303 [Disponibilità ristretta]
Web of Science: 14 - Scopus: 24
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1999

Articolo di rivista Baldi M.; Macii A.; Macii E.; Poncino M. (1999)
Application of symbolic FSM Markovian analysis to protocol verification. In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES, vol. 146 n. 5, pp. 221-226. - ISSN 1350-2387
Web of Science: 0 - Scopus: 2

Articolo di rivista Benini Il.; De Micheli G.; Lioy A.; Macii E.; Odasso G.; Poncino M. (1999)
Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting. In: IEEE TRANSACTIONS ON COMPUTERS, vol. 48, pp. 769-779. - ISSN 0018-9340
Web of Science: 23 - Scopus: 26

Articolo in atti di convegno Corgnati R; Macii E.; Poncino M (1999)
Clustered Table-Based Macromodels for RTL Power Estimation. In: GLS-VLSI-99: IEEE/ACM 9th Great Lakes Symposium on VLSI, Ann Arbor, MI. pp. 354-357
Web of Science: 10 - Scopus: 15

Articolo in atti di convegno Benini L; De Micheli G; Lioy A; Macii E.; Odasso G; Poncino M (1999)
Computational Kernels and their Application to Sequential Power Optimization. In: DAC-35: ACM/IEEE Design Automation Conference, San Francisco, CA. pp. 764-769

Articolo in atti di convegno Macii A; Macii E.; Poncino M; Scarsi R (1999)
Extending Spectral Synthesis of Binary Streams to Sequential Circuits. In: PACRIM-99: IEEE 1999 Pacific Rim Conference on Communications, Computers and Signal Processing, Victoria, British Columbia. pp. 479-482
Scopus: 0

Articolo in atti di convegno Benini L; De Micheli G; Macii A; Macii E.; Poncino M; Scarsi R (1999)
Glitch power minimization by gate freezing. In: DATE 99, Design, Automation and Test in Europe Conference and Exhibition 1999, Munich, Germany, 9-12 March 1999. pp. 163-167 [Disponibilità ristretta]
Web of Science: 3 - Scopus: 5
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Articolo di rivista Benini L.; De Micheli G.; Macii A.; Macii E.; Poncino M. (1999)
A Methodology for the Automatic Selection of Instruction Op-Codes of Low-Power Core Processors. In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES, vol. 146. - ISSN 1350-2387

Articolo in atti di convegno Bogliolo A; Corgnati R; Macii E.; Poncino M (1999)
Parameterized RTL Power Models for Combinational Soft Macros. In: ICCAD-99: IEEE/ACM 1999 International Conference on Computer-Aided Design, San Jose, CA. pp. 284-287
Scopus: 6

Articolo in atti di convegno Anton C; Bogliolo A; Civera P; Colonescu I; Macii E.; Poncino M (1999)
RTL Macromodels for Non-Stationary Workloads. In: PATMOS-99: IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation, Kos Island, Greece. pp. 313-322

Articolo in atti di convegno Guardiani C; Macii A; Macii E.; Poncino M; Rossello M; Scarsi R; Silvano C; Zafalon R (1999)
RTL Power Estimation in an Industrial Design Flow. In: VOLTA-99: IEEE Alessandro Volta Memorial Workshop on Low Power Design, Como, Italy. pp. 91-96
Web of Science: 0

Articolo in atti di convegno L. Benini; Macii A.; E. Macii; M. Poncino (1999)
Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems. In: DSD-99: Euromicro Workshop on Digital System Design: Architectures, Methods and Tools, Milano, Settembre 1999. pp. 371-378
Scopus: 4

Articolo in atti di convegno Macii A; Macii E.; Odasso G; Poncino M; Scarsi R (1999)
Regression-Based Macromodeling for Delay Estimation of Behavioral Components. In: GLS-VLSI-99: IEEE/ACM 9th Great Lakes Symposium on VLSI, Ann Arbor, MI. pp. 188-191
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Benini L.; Macii A.; Macii E.; Poncino M. (1999)
Selective Instruction Compression for Memory Energy Reduction in Embedded Systems. In: ISLPED-99: ACM/IEEE International Symposium on Low Power Electronics and Design, Agosto. pp. 206-211
Scopus: 77

Articolo di rivista Benini L.; De Micheli G.; Macii E.; Poncino M.; Scarsi R. (1999)
Symbolic Synthesis of Clock-Gating Logic for Power Optimization of Synchrounous Controllers. In: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, vol. 4. - ISSN 1084-4309

Articolo in atti di convegno Benini L.; Macii A.; Macii E.; Poncino M.; Scarsi R. (1999)
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. In: DAC-36: ACM/IEEE Design Automation Conference, Giugno. pp. 128-133
Scopus: 34

1998

Articolo in atti di convegno Macii E.; Poncino M; Scarsi R (1998)
A Comparative Study of Complexity-Based Capacitance Macro-Models. In: IEEE 32nd Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA. pp. 1038-1041
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Macii E.; Odasso G; Poncino M (1998)
Comparing Different Boolean Unification Algorithms. In: IEEE 32nd Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA. pp. 1052-1056
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Benini L; Macii A; Macii E.; Poncino M; Scarsi R (1998)
F-Gate: A Device for Glitch Power Minimization. In: IEEE 32nd Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA. pp. 1047-1051
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno Ferrandi F.; Macii A.; Macii E.; Poncino M.; Scarsi R.; Somenzi F. (1998)
Layout-Oriented Synthesis of PTL Circuits Based on BDDs. In: IWLS-98: ACM/IEEE International Workshop on Logic Synthesis, Giugno. pp. 514-519

Articolo in atti di convegno Ferrandi F; Fummi F; Macii E.; Poncino M; Sciuto D (1998)
Power Estimation of Behavioral Descriptions. In: DATE-98: IEEE 1998 Design Automation and Test in Europe, Paris, France. pp. 762-766
Web of Science: 15 - Scopus: 14

Articolo di rivista Benini L.; De Micheli G.; Macii E.; Poncino M.; Quer S. (1998)
Power Optimization of Core-Based Systems By Address Bus Encoding. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. VLSI-6, pp. 554-562. - ISSN 1063-8210
Web of Science: 44 - Scopus: 66

Articolo in atti di convegno Macii A.; Macii E.; Poncino M. (1998)
Reducing Peak Power Consumption of Combinational Test Sets. In: IEEE Asilomar Conference on Signals, Systems and Computers, Novembre. pp. 1042-1046
Web of Science: 0 - Scopus: 3

Articolo in atti di convegno Benini L; De Micheli G; Macii A; Macii E.; Poncino M (1998)
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. In: GLS-VLSI-98: IEEE/ACM 8th Great Lakes Symposium on VLSI, Lafayette, LA. pp. 8-12
Web of Science: 10 - Scopus: 18

Articolo in atti di convegno B. Kumthekar, E. Macii, M. Poncino, F. Somenzi (1998)
Simulation-Based Re-Synthesis of Sequential Circuits for Peak Sustainable Power Reduction. In: IWLS.

Articolo in atti di convegno Benini L; De Micheli G; Macii A; Macii E.; Poncino M; Scarsi R (1998)
A Stream Compaction Technique Based on Multi-Level Power Simulation. In: PATMOS '98 : 8th international workshop, Lyngby, Denmark, October 7-9, 1998. pp. 203-212 [Disponibilità ristretta]
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Articolo in atti di convegno Macii A; Macii E.; Poncino M; Scarsi R (1998)
Stream Synthesis for Efficient Power Simulation Based on Spectral Transforms. In: ISLPED-98: ACM/IEEE International Symposium on Low Power Electronics and Design, Monterey, CA. pp. 25-30
Web of Science: 0

Articolo in atti di convegno Ferrandi F; Macii A; Macii E.; Poncino M; Scarsi R; Somenzi F (1998)
Symbolic Algorithms for Layout-Oriented Synthesis of Pass Transistor Logic Circuits. In: ICCAD-98: IEEE/ACM 1998 International Conference on Computer-Aided Design, San Jose, CA. pp. 235-241
Web of Science: 1 - Scopus: 19

Articolo di rivista Benini L.; De Micheli G; Macii E.; Poncino M. (1998)
Telescopic Units: A New Paradigm for Performance Optimization of VLSI Designs. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. CAD-17, pp. 220-232. - ISSN 0278-0070
Web of Science: 45 - Scopus: 58

Articolo in atti di convegno Benini L; De Micheli G; Lioy A; Macii E.; Odasso G; Poncino M (1998)
Timed Supersetting and the Synthesis of Large Telescopic Units. In: GLS-VLSI-98: IEEE/ACM 8th Great Lakes Symposium on VLSI, Lafayette, LA. pp. 331-337
Web of Science: 0 - Scopus: 0

1997

Articolo in atti di convegno A. Lioy, E. Macii, M. Poncino, M. Rossello (1997)
Accurate entropy calculation for large logic circuits based on output clustering. In: 7th Great Lakes Symposium on VLSI, Urbana-Champaign, IL (USA), 13-15 Mar 1997. pp. 70-75 [Disponibilità ristretta]
Web of Science: 5 - Scopus: 6
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Articolo di rivista Macii E; Poncino M. (1997)
An Application of Hopfield Neural Networks to Symbolic Power Analysis of VLSI Digital Circuits. In: INTERNATIONAL JOURNAL OF ENGINEERING SCIENCE, vol. 35, pp. 783-792. - ISSN 0020-7225
Scopus: 2

Articolo di rivista Macii E.; Poncino M. (1997)
Cellular-Automata Models for Reliability Analysis of Systems on Silicon. In: IEEE TRANSACTIONS ON RELIABILITY, vol. 46, pp. 173-183. - ISSN 0018-9529
Web of Science: 2 - Scopus: 3

Articolo in atti di convegno Benini L; Macii E.; Poncino M (1997)
Efficient Controller Design for Telescopic Units. In: ISIS-97: IEEE 1997 International Conference on Innovative Systems in Silicon, Austin, TX. pp. 290-299
Web of Science: 0 - Scopus: 7

Articolo di rivista Macii E; Poncino M. (1997)
An Exact Algorithm for Computing the Entropy of a Logic Circuit. In: INTERNATIONAL JOURNAL OF COMPUTERS AND THEIR APPLICATIONS, vol. 4, pp. 49-55. - ISSN 1076-5204

Articolo in atti di convegno Benini L; De Micheli G; Macii E.; Poncino M; Scarsi R (1997)
Fast Power Estimation for Deterministic Input Streams. In: ICCAD-97: IEEE/ACM 1997 International Conference on Computer-Aided Design, San Jose,CA. pp. 494-501
Web of Science: 0 - Scopus: 5

Articolo in atti di convegno Benini L; De Micheli G; Macii E.; Poncino M; Scarsi R (1997)
Integrating Logic-Level Power Management Techniques. In: SASIMI-97: 7th Workshop on Synthesis and System Integration of Mixed Technologies, Osaka, Japan. pp. 59-65

Articolo in atti di convegno Benini L; De Micheli G; Macii E.; Poncino M; Quer S; Sciuto D; Silvano C (1997)
On-Going Research on Address Bus Encoding for Low Power: A Status Report. In: IWLS-97: ACM/IEEE 1997 International Workshop on Logic Synthesis, Lake Tahoe, CA.

Articolo in atti di convegno Benini L., De Micheli G., Macii E., Poncino M., Scarsi R. (1997)
Symbolic Low-Power Re-Synthesis of Large Sequential Circuits Based on Clock Gating Mechanisms. In: ED&TC'97: 1997 European Design and Test Conference.
Web of Science: 12

Articolo in atti di convegno Benini L; De Micheli G; Macii E.; Poncino M; Quer S (1997)
System-Level Power Optimization of Special Purpose Applications: The Beach Solution. In: ISLPED-97: ACM/IEEE International Symposium on Low Power Electronics and Design, Monterey, CA. pp. 24-29
Web of Science: 29 - Scopus: 61

Articolo in atti di convegno Benini L; De Micheli G; Macii E.; Poncino M (1997)
Telescopic Units: A New Paradigm for Performance Optimization of VLSI Designs. In: IWLS-97: ACM/IEEE 1997 International Workshop on Logic Synthesis, Lake Tahoe, CA.

Articolo di rivista Ferrandi F.; Fummi F.; Macii E.; Poncino M.; Sciuto D. (1997)
Testing Core-Based Digital Systems: A Symbolic Methodology. In: IEEE DESIGN & TEST OF COMPUTERS, vol. 13, pp. 69-77. - ISSN 0740-7475
Web of Science: 3 - Scopus: 6

1996

Articolo di rivista Cho H.; Hachtel G.D.; Macii E.; Poncino M.; Somenzi F. (1996)
Automatic State Space Decomposition for Approximate FSM Traversal Based on Circuit Structural Analysis. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. CAD-15, pp. 1451-1464. - ISSN 0278-0070
Web of Science: 17 - Scopus: 20

Articolo in atti di convegno Ferrandi F; Fummi F; Macii E.; Poncino M; Sciuto D (1996)
BDD-Based Testability Estimation of VHDL Designs. In: EuroVHDL-96: IEEE 1996 European VHDL Conference, Geneva, Switzerland. pp. 444-449
Web of Science: 1 - Scopus: 3

Articolo in atti di convegno Baldi M.; Macii E.; Poncino M. (1996)
Efficient analysis of communication protocols using VHDL modeling and simulation. In: ASICON-96: IEEE 1996 International Conference on ASIC, Shangai, China, 21-24 Oct 1996. pp. 428-431 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 0
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Articolo in atti di convegno Cabodi G.; P. Camurati; L. Lavagno; E. Macii; M. Poncino; S. Quer; E. Sentovich (1996)
Enhancing FSM Traversal by Temporary Re-Encoding. In: ICCD'96: IEEE International Conference on Computer Design, Austin, October 1996. pp. 6-11
Web of Science: 2 - Scopus: 2

Articolo di rivista Macii E.; Poncino M. (1996)
Estimating Power Consumption of CMOS Circuits Modeled as Symbolic Neural Networks. In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES, vol. 143, pp. 331-336. - ISSN 1350-2387
Web of Science: 1 - Scopus: 4

Articolo in atti di convegno Macii E.; Poncino M (1996)
Exact Computation of the Entropy of a Logic Circuit. In: GLS-VLSI-96: IEEE/ACM 6th Great Lakes Symposium on VLSI, Ames, IA. pp. 162-167
Web of Science: 1 - Scopus: 4

Articolo in atti di convegno Poncino M. (1996)
Implicit Evaluation of Encoding Rotations for Large FSMs. In: MWSCAS'96: IEEE Midwest Symposium on Circuits and Systems.
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Macii E.; Poncino M (1996)
Power Consumption of Static and Dynamic CMOS Circuits: A Comparative Study. In: ASICON-96: IEEE 1996 International Conference on ASIC, Shangai, China. pp. 425-427
Web of Science: 1 - Scopus: 2

Articolo in atti di convegno Baldi M.; Macii E.; Poncino M. (1996)
Property verification of communication protocols based on probabilistic reachability analysis. In: MWSCAS'96: IEEE Midwest Symposium on Circuits and Systems, Ames, IA (USA), 18-21 Aug 1996. pp. 1143-1146 [Disponibilità ristretta]
Web of Science: 0 - Scopus: 1
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Articolo in atti di convegno Ferrandi F; Fummi F; Macii E.; Poncino M; Sciuto D (1996)
Simplifying Sequential Gate-Level Test Generation Through Exploitation of High-Level Information. In: ETW-96: IEEE 1996 European Test Workshop, Montpellier, France. pp. 154-158

Articolo in atti di convegno Ferrandi F; Fummi F; Macii E.; Poncino M; Sciuto D (1996)
Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. In: DAC-33: ACM/IEEE Design Automation Conference, Las Vegas, NV. pp. 467-470
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Ferrandi F.; Fummi F.; Macii E.; Poncino M.; Sciuto D. (1996)
Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. In: GLS-VLSI-96, 6th IEEE/ACM Great Lakes Symposium on VLSI, Ames (IA, USA). pp. 208-213
Web of Science: 1 - Scopus: 1

Articolo di rivista Macii E.; Poncino M. (1996)
Using Symbolic Rademacher-Walsh Spectral Transforms to Evaluatethe Agreement Between Boolean Functions. In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES, vol. 143, pp. 64-68. - ISSN 1350-2387
Web of Science: 6 - Scopus: 7

1995

Articolo in atti di convegno Cho H; Hachtel G. D; Macii E.; Poncino M; Ravi K; Somenzi F (1995)
Approximate Finite State Machine Traversal: Extensions and New Results. In: IWLS-95: ACM/IEEE 1995 International Workshop on Logic Synthesis, Lake Tahoe, CA.

Articolo in atti di convegno Manne S; Pardo A; Bahar R. I; Hachtel G.D. Somenzi F; Macii E.; Poncino M (1995)
Computing the Maximum Power Cycles of a Sequential Circuit. In: DAC-32: ACM/IEEE Design Automation Conference, San Francisco, CA. pp. 23-28
Web of Science: 3 - Scopus: 15

Articolo in atti di convegno Macii E.; Poncino M (1995)
The Design of Easily Scalable Bus Arbiters with Different Dynamic Priority Assignment Schemes. In: IEEE 29th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA. pp. 211-213

Articolo in atti di convegno Macii E.; Poncino M (1995)
Estimating Worst-Case Power Consumption of Combinational Circuits Modeled as Neural Networks. In: GLS-VLSI-95: IEEE/ACM 5th Great Lakes Symposium on VLSI, Buffalo, NY. pp. 60-65
Web of Science: 1 - Scopus: 2

Articolo in atti di convegno Lioy A.; Poncino M. (1995)
Exact Functional Redundancy Identification. In: IEEE Pacific Rim Conference on Communications, Computer and Signal Processing.
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno Baldi M.; Macii E.; Poncino M. (1995)
Hardware simulation: a flexible approach to verification and performance evaluation of communication protocols. In: IEEE 29th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA (USA), Oct. 30 1995-Nov. 1 1995. pp. 945-948 [Disponibilità ristretta]
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Articolo di rivista Macii E; Poncino M. (1995)
The Impact of Cell Library Characteristics on Area, Speed, and Power Consumption of CMOS Circuits. In: INTERNATIONAL JOURNAL OF ELECTRONICS, vol. 78, pp. 395-407. - ISSN 0020-7217
Web of Science: 0 - Scopus: 0

Articolo di rivista Alovisio D; Cianchini S; Macii; Poncino M. (1995)
Modeling Sequential Circuits with Cellular Automata. In: INTERNATIONAL JOURNAL OF SYSTEMS SCIENCE, vol. 7, pp. 1415-1428. - ISSN 0020-7721
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Manne S.; Pardo A.; Bahar I.; Macii E.; Poncino M.; Hachtel G.; Somenzi F. (1995)
On Computing the Maximum Power Cycles of a Sequential Circuit. In: DAC-32: 32nd Design Automation Conference.
Web of Science: 3 - Scopus: 15

Articolo in atti di convegno Macii E.; Poncino M. (1995)
Predicting the Complexity of Large Combinational Circuitsby Symbolic Spectral Analysis of Boolean Functions. In: Euro-DAC'95: European Design Automation Conference.
Web of Science: 0

Articolo di rivista Alovisio D; Cianchini S; Macii; Poncino M. (1995)
A Sequential Circuit Simulator Based on Hybrid Cellular Automata. In: SYSTEMS ANALYSIS, MODELLING, SIMULATION, pp. 245-253. - ISSN 0232-9298

Articolo di rivista Macii E; Poncino M. (1995)
Symbolic Representation and Manipulation of Large Neural Networks. In: INTERNATIONAL JOURNAL OF COMPUTERS AND THEIR APPLICATIONS, vol. 2, pp. 104-111. - ISSN 1076-5204

Articolo in atti di convegno Macii E.; Poncino M (1995)
Symbolic Representation and Manipulation of Large Neural Networks. In: IEEE 1995 International Conference on Computer Applications in Engineering and Medicine, Indianapolis, IN. pp. 112-116
Scopus: 1

Articolo in atti di convegno Lioy A.; Maino F.; Odasso G.; Poncino M. (1995)
Testing Hyperactive Faults in Asynchronous Circuits. In: IEEE Pacific Rim Conference on Communications, Computer and Signal Processing.
Web of Science: 0 - Scopus: 1

Articolo di rivista Macii E; Poncino M. (1995)
Using Connectivity and Spectral Methods to Characterize the Structure of Sequential Logic Circuits. In: MICROPROCESSING AND MICROPROGRAMMING, vol. 41, pp. 487-500. - ISSN 0165-6074
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Macii E.; Poncino M (1995)
Using Symbolic Rademacher-Walsh Spectral Transforms to Evaluate the Correlation between Boolean Functions. In: GLS-VLSI-95: IEEE/ACM 5th Great Lakes Symposium on VLSI, Buffalo, NY. pp. 112-116
Web of Science: 0 - Scopus: 1

1994

Articolo in atti di convegno R.I. Bahar, G.D. Hachtel, E. Macii, A. Pardo, M. Poncino, F. Somenzi (1994)
An ADD-based algorithm for shortest path back-tracing of large graphs. In: GLS-VLSI'94: 4th IEEE Great Lake Symposium on VLSI, Notre Dame, IN (USA), 4-5 Mar 1994. pp. 248-251 [Disponibilità ristretta]
Scopus: 1
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Articolo in atti di convegno Evans A.; Macii E.; Poncino M. (1994)
Adding Control Signals to Enhance Circuit Testability. In: ASICON'94: 1994 IEEE International Conference on ASIC,.

Articolo in atti di convegno Poncino M. (1994)
Applications of Boolean Unification to Logic Synthesis. In: IEEE Canadian Conference on Electronic and Computer Engineering.
Scopus: 0

Articolo in atti di convegno Macii E.; Poncino M (1994)
Connectivity and Spectral Analysis of Finite State Machines. In: MWSCAS-94: IEEE 37th Midwest Symposium on Circuits and Systems, Lafayette, LA. pp. 377-380
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Alovisio D; Cianchini S; Macii E.; Poncino M (1994)
Describing Input Behavior of Sequential Circuits Modeled as Cellular Automata. In: ASICON-94: IEEE 1994 International Conference on ASIC, Beijing, China. pp. 79-82

Articolo in atti di convegno Macii E.; Poncino M (1994)
FPGA Synthesis Using Look-Up Table and Multiplexor Based Architectures. In: MELECON-94: IEEE 8th Mediterranean Electrotechnical Conference, Antalya, Turkey. pp. 302-304
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Macii E.; Poncino M (1994)
The Impact of Gate Delay Models on Power Estimation for CMOS Circuits. In: ASICON-94: IEEE 1994 International Conference on ASIC, Beijing, China. pp. 41-44

Articolo in atti di convegno Macii E.; Poncino M (1994)
Look-Up Table FPGA Realization of m-out-of-n Bit Voters. In: CCECE-94: IEEE 1994 Canadian Conference on Electrical and Computer Engineering, Halifax, Nova Scotia. pp. 190-193
Scopus: 1

Articolo in atti di convegno Hachtel G.; Hermida M.; Pardo A.; Poncino M.; Somenzi F. (1994)
Re-encoding Sequential Circuits to Reduce Power Dissipation. In: ICCAD'94: ACM/IEEE International Conference on CAD.
Web of Science: 16 - Scopus: 33

Articolo in atti di convegno Macii E.; Poncino M (1994)
STG Characteristics of the ISCAS'89 Benchmarks. In: ASICON-94: IEEE 1994 International Conference on ASIC, Beijing, China. pp. 177-180

Articolo in atti di convegno Cho H; Hachtel G. D; Macii E.; Poncino M; Somenzi F (1994)
A State Space Decomposition Algorithm for Approximate FSM Traversal. In: EDTC-94: IEEE 1994 European Design and Test Conference, Paris, France. pp. 137-141
Scopus: 4

Articolo in atti di convegno Cho H; Hachtel G. D; Macii E.; Poncino M; Somenzi F (1994)
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis. In: ICCD-94: IEEE 1994 International Conference on Computer Design, Cambridge, MA. pp. 236-239
Web of Science: 6 - Scopus: 13

Articolo in atti di convegno Evans A.; Macii E.; Poncino M. (1994)
Synthesis of Fully Testable Combinational Logic. In: MWSCAS'94: IEEE Midwest Symposium on Circuits and Systems.

1993

Articolo in atti di convegno Fahrat H.; Lioy A.; Poncino M. (1993)
Exact Computation of Detectability Profile,''. In: CICC'93: IEEE Custom Integrated Circuits Conference.

Articolo in atti di convegno Macii E.; Poncino M (1993)
Experiments on Technology Mapping Using Different Cell Libraries. In: IEEE 5th NASA Symposium on VLSI Design, Albuquerque, NM. 9.3.1-9.3.9

Articolo in atti di convegno Lioy A; Poncino M. (1993)
On the Resetability of Synchronous Sequential Circuits. In: ISCAS'93: IEEE Int. Symposium on Circuits and Systems.
Scopus: 0

1991

Articolo in atti di convegno Lioy A.; Poncino M. (1991)
A Hierarchical Multi-Level Test Generation System. In: GLS-VLSI'91: 1st Great Lake State Symposium.

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