Pubblicazioni il cui periodico è "IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS"

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Numero di pubblicazioni : 41.

Articolo di rivista Riefert, Andreas; Cantoro, Riccardo; Sauer, Matthias; Sonza Reorda, Matteo; Becker, Bernd (2016)
A Flexible Framework for the Automatic Generation of SBST Programs. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, pp. 1-12. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 2
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Articolo di rivista Causapruno, Giovanni; Riente, Fabrizio; Turvani, Giovanna; Vacca, Marco; Ruo Roch, Massimo; Zamboni, Maurizio; Graziano, Mariagrazia (2016)
Reconfigurable Systolic Array: From Architecture to Physical Design for NML. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 24 n. 11, pp. 3208-3217. - ISSN 1063-8210
Web of Science: 2 - Scopus: 5
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Articolo di rivista M. Vacca; J. Wang; M. Graziano; M. Ruo Roch; M. Zamboni (2015)
Feedbacks in QCA: a Quantitative Approach. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 23 n. 10, pp. 2233-2243. - ISSN 1063-8210
Web of Science: 4 - Scopus: 6
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Articolo in atti di convegno Airo Farulla, Giuseppe; Russo, Ludovico O.; Gallifuoco, Vincenzo; Indaco, Marco (2015)
A Novel Architectural Pattern to Support the Development of Human-Robot Interaction (HRI) Systems Integrating Haptic Interfaces and Gesture Recognition Algorithms. In: VLSI (ISVLSI), 2015 IEEE Computer Society Annual Symposium on, Montpellier (Fr), 8-10 July 2015. pp. 386-391
Web of Science: 0 - Scopus: 0

Articolo di rivista Sanchez E.; Sonza Reorda M. (2015)
On the Functional Test of Branch Prediction Units. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 23 n. 9, pp. 1675-1688. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 6 - Scopus: 7
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Articolo di rivista Causapruno G.; Urgese G.; Vacca M.; Graziano M.; Zamboni M. (2015)
Protein Alignment Systolic Array Throughput Optimization. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 23 n. 1, pp. 68-77. - ISSN 1063-8210
Web of Science: 5 - Scopus: 3
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Articolo di rivista Di Carlo, S.; Gambardella, G.; Prinetto, P.; Rolfo, D.; Trotta, P. (2015)
SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 23 n. 10, pp. 2198-2208. - ISSN 1063-8210
Web of Science: 2 - Scopus: 3
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Articolo di rivista Haroon Mahmood; Mirko Loghi; Massimo Poncino; Enrico Macii (2014)
Energy/Lifetime Cooptimization by Cache Partitioning With Graceful Performance Degradation. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 22 n. 8, pp. 1705-1716. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 2 - Scopus: 3
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Articolo di rivista Sabena D.; Sonza Reorda M.; Sterpone L. (2014)
On the Automatic Generation of Optimized Software-Based Self-Test Programs for VLIW Processors. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 22 n. 4, pp. 813-823. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 3 - Scopus: 7
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Articolo di rivista L.G. Amaru; M. Martina; G. Masera (2012)
High speed architectures for finding the firsttwo maximum/minimum values. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 20 n. 12, pp. 2342-2346. - ISSN 1063-8210
Web of Science: 23 - Scopus: 25
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Articolo di rivista M. Vacca; M. Graziano; M. Zamboni (2012)
NanoMagnetic Logic Microprocessor Hierarchical Power Model. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 20 n. 8, pp. 1410-1420. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 6 - Scopus: 19
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Articolo di rivista Pulimeno A.; Graziano M.; Piccinini G (2012)
UDSM Trends Comparison: From Technology Roadmap to Ultra-Sparc Niagara2. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 20 n. 7, pp. 1341-1346. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 19 - Scopus: 31
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Articolo di rivista Villavicencio Y.; Musolino F.; Fiori F.; (2011)
Electrical Model of Microcontrollers for the Prediction of Electromagnetic Emissions. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 19 n. 7, pp. 1205-1217. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 6 - Scopus: 10
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Articolo di rivista Sathanur A.; Benini L.; Macii A.; Macii E.; Poncino M. (2011)
Fast Computation of Discharge Current Upper Bounds for Clustered Power-Gating. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 19 n. 1, pp. 146-151. - ISSN 1063-8210
Web of Science: 2 - Scopus: 3

Articolo di rivista Sathanur A.; Benini L; Macii A.; Macii E.; Poncino M. (2011)
Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 19 n. 3, pp. 469-482. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 7 - Scopus: 12
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Articolo di rivista A. Calimera;R. Bahar;E. Macii;M. Poncino (2010)
Temperature-Insensitive Dual-Vth Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 18 n. 11, pp. 1608-1620. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 7 - Scopus: 2
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Articolo di rivista Barbara Cerato; Masera G.; Emanuele Viterbo (2009)
Decoding the Golden Code: a VLSI design. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 17, pp. 156-160. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 10 - Scopus: 14
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Articolo di rivista Appello D; Bernardi P; Grosso M.; Sanchez E; Sonza Reorda M (2009)
Effective Diagnostic Pattern Generation Strategy forTransition-Delay Faults in Full-Scan SOCs. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 17 (11), pp. 1654-1659. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 1 - Scopus: 3
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Articolo di rivista Azzoni P; Loghi M; Poncino M. (2009)
Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 17 n. 5, pp. 728-732. - ISSN 1063-8210
Web of Science: 2 - Scopus: 4

Articolo di rivista Tota S.; Casu M.R.; Ruo Roch M.; L. Macchiarulo; Zamboni M. (2009)
A case study for NoC based homogeneous MPSoC architectures. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 17 n. 3, pp. 384-388. - ISSN 1063-8210
Web of Science: 10 - Scopus: 20
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Articolo di rivista Chakraborty A.; Duraisami K.; Visweswara Sathanur A.; Sithambaram P.; Macii A.; Macii E.; Poncino M. (2008)
Dynamic thermal clock skew compensation using tunable delay buffers. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 16 n. 6, pp. 639-649. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 24 - Scopus: 36
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Articolo di rivista Benso A.; Di Carlo S.; Prinetto P.; Zorian Y. (2008)
IEEE Standard 1500 Compliance Verification for Embedded Cores. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 16 n. 4, pp. 397-407. - ISSN 1063-8210
Web of Science: 7 - Scopus: 15
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Articolo di rivista Blunno I; Lavagno L. (2004)
Designing an asynchronous microcontroller using pipefitter. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 12(7). - ISSN 1063-8210
Web of Science: 1 - Scopus: 2

Articolo di rivista Casu M.R.; Graziano M.; Masera G.; Piccinini G.; Zamboni M. (2004)
An Electromigration and Thermal Model of Power Wires for a Priori High-Level Reliability Prediction. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 12, pp. 349-358. - ISSN 1063-8210
Web of Science: 10 - Scopus: 13
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Articolo di rivista Macii E. (2004)
Low Power Challenges in the Design of Nanoelectronic Circuits and Systems. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 12, pp. 1129-1130. - ISSN 1063-8210

Articolo di rivista Benini L.; Bruni D.; Macii A.; Macii E. (2004)
Memory Energy Minimization by Data Compression: Algorithms, Architectures and Implementation. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 12-3, pp. 255-268. - ISSN 1063-8210
Web of Science: 4 - Scopus: 5

Articolo di rivista Benini L.; Macii A.; Macii E.; Poncino M.; Scarsi R. (2003)
Scheduling Battery Usage in Mobile Systems. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 11-6, pp. 1136-1143. - ISSN 1063-8210
Web of Science: 15 - Scopus: 21

Articolo di rivista G. Masera; M. Mazza; Piccinini Gianluca; F. Viglione; M. Zamboni (2002)
Architectural Strategies for Low-Power VLSI Turbo Decoders. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10, pp. 279-285. - ISSN 1063-8210
Web of Science: 26 - Scopus: 31

Articolo di rivista M. Lajolo; A. Raghunathan; S. Dey; Lavagno L. (2002)
Cosimulation-based power estimation for system-on-chip design. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10(3). - ISSN 1063-8210
Web of Science: 22 - Scopus: 32

Articolo di rivista Benini L.; Macchiarulo L.; Macii A.; Poncino M. (2002)
Layout-Driven Memory Synthesis for Embedded Systems-on-Chip. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10-2, pp. 96-105. - ISSN 1063-8210
Web of Science: 35 - Scopus: 51

Articolo di rivista Macii E.; Verbauwhede I. (2002)
Low-Power Electronics and Design. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10, pp. 69-70. - ISSN 1063-8210
Scopus: 0

Articolo di rivista Benini L.; Macii A.; Macii E.; Poncino M. (2002)
Minimizing Memory Access Energy in Embedded Systems by Selective Instruction Compression. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 10, pp. 521-531. - ISSN 1063-8210
Web of Science: 11 - Scopus: 12

Articolo di rivista Benini L.; Castelli G.; Macii A.; Macii E.; Poncino M.; Scarsi R. (2001)
Discrete-time battery models for system-level low-power design. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9 n. 5, pp. 630-640. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 64 - Scopus: 92
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Articolo di rivista Kruse L.; Schmidt E.; Jochens G.; Stammermann A.; Schulte M; Macii E.; Nebel W. (2001)
Estimation of Lower and Upper Bounds on the Power Consumption from Scheduled Data Flow Graphs. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9, pp. 3-14. - ISSN 1063-8210
Web of Science: 23 - Scopus: 34

Articolo di rivista Bogliolo A.; Corgnati R.; Macii E.; Poncino M. (2001)
Parameterized RTL Power Models for Combinational Soft Macros. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9. - ISSN 1063-8210

Articolo di rivista Bogliolo A.; Corgnati R.; Macii E.; Poncino M. (2001)
Parameterized RTL Power Models for Soft Macros. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9, pp. 880-887. - ISSN 1063-8210
Web of Science: 16 - Scopus: 20

Articolo di rivista Macii A.; Macii E.; Poncino M.; Scarsi R. (2001)
Stream Synthesis for Efficient Power Simulation Based on SpectralTransforms. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 9, pp. 417-426. - ISSN 1063-8210
Web of Science: 3 - Scopus: 4

Articolo di rivista Benini L.; De Micheli G.; Macii A.; Macii E.; Poncino M. (2000)
Glitch power minimization by selective gate freezing. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 8 n. 3, pp. 287-298. - ISSN 1063-8210 [Disponibilità ristretta]
Web of Science: 19 - Scopus: 28
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Articolo di rivista Masera G.; Piccinini G.; Ruo Roch M.; Zamboni M. (1999)
VLSI architectures for turbo codes. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 7, pp. 369-379. - ISSN 1063-8210
Web of Science: 82 - Scopus: 107

Articolo di rivista Benini L.; De Micheli G.; Macii E.; Poncino M.; Quer S. (1998)
Power Optimization of Core-Based Systems By Address Bus Encoding. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. VLSI-6, pp. 554-562. - ISSN 1063-8210
Web of Science: 44 - Scopus: 66

Articolo di rivista A.V. Yakovlev; A. I Petrov; Lavagno L. (1994)
A low latency asynchronous arbitration circuit. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210
Scopus: 10

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