Pubblicazioni la cui area disciplinare è "Area 09 - Ingegneria industriale e dell'informazione > SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI" e l'anno è "2000"

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Numero di pubblicazioni : 30.

A

Articolo in atti di convegno L. Benini; Macii A.; E. Macii; M. Poncino (2000)
Analysis of Energy Dissipation in the Memory Hierarchy of Embedded Systems: A Case Study. In: MELECON-00: IEEE Mediterranean Electrotechnical Conference, Cyprus, Maggio 2000. pp. 236-239
Web of Science: 0 - Scopus: 1

Articolo in atti di convegno F. Corno; A. Manzone; A. Pincetti; Sonza Reorda M.; G. Squillero (2000)
Automatic test bench generation for validation of RT-level descriptions: an industrial experience. In: Design, Automation and Test in Europe Conference and Exhibition 2000, Paris (FRA), 27-30 Mar 2000. pp. 385-389 [Disponibilità ristretta]
Scopus: 32
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Articolo in atti di convegno Benso A.; Chiusano S.; Prinetto P. (2000)
A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT. In: IEEE International On-Line Testing Workshop, 3-5 July 2000. pp. 9-16
Web of Science: 5 - Scopus: 1

Articolo in atti di convegno L. Benini; G. Castelli; Macii A.; E. Macii; M. Poncino; R. Scarsi (2000)
A Discrete-Time Battery Model for High-Level Power Estimation. In: DATE-00: IEEE Design Automation and Test in Europe, Paris, France, Marzo 2000. pp. 35-39
Scopus: 90

Articolo in atti di convegno L. Benini; Macii A.; M. Poncino (2000)
A Recursive Algorithm for Low-Power Memory Partitioning. In: ISLPED-00: ACM/IEEE International Symposium on Low Power Electronics and Design, Rapallo/Portofino Coast, Luglio 2000. pp. 78-83
Web of Science: 9

Articolo in atti di convegno Benso A.; Chiusano S.; Di Carlo S.; Di Natale G.; Lobetti Bodoni M.; Prinetto P. (2000)
An effective distributed BIST architecture for RAMs. In: IEEE European Test Workshop (ETW), Cascais, PT, 23-26 May 2000. pp. 119-124
Web of Science: 3
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Articolo in atti di convegno Rebaudengo M.; Sonza Reorda M.; Torchiano M.; Violante M. (2000)
An experimental evaluation of the effectiveness of automatic rule-based transformations for safety-critical applications. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. pp. 257-265
Web of Science: 8 - Scopus: 9

Articolo in atti di convegno Benso A; Chiusano S; Di Natale G; Lobetti Bodoni M; Prinetto P. (2000)
A family of Self-Repair SRAM cores. In: IOLTW 2000: IEEE International On-Line Test Workshop, July 2000. pp. 214-218
Web of Science: 5 - Scopus: 18

Articolo in atti di convegno Berbecaru D.; Corradi A.; Lioy A.; Maino F.; Montanari R.; Stefanelli C. (2000)
A flexible management framework for certificate status validation. In: IFIP/SEC-2000: 15th IFIP Int. Conf. on Information Security, Bejing (China), August 22-24, 2000. pp. 481-490
Web of Science: 0

Articolo in atti di convegno Benso A.; Di Carlo S.; Di Natale G.; Prinetto P.; Lobetti Bodoni M. (2000)
A programmable BIST architecture for clusters of Multiple-Port SRAMs. In: IEEE International Test Conference (ITC), Atlantic City (NJ), USA, 3-5 Oct. 2000. pp. 557-566
Web of Science: 16 - Scopus: 23
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B

Articolo in atti di convegno Benini L; Castelli G; Macii A; Macii E.; Scarsi R (2000)
Battery-Driven Dynamic Power Management of Portable Systems. In: ISSS-00: IEEE International Symposium on System Synthesis, Madrid, Spain. pp. 25-30
Web of Science: 8 - Scopus: 21

D

Articolo in atti di convegno C. Raibulet; Demartini C.G.; O. Constantin (2000)
Data Specification and Implementation for Industrial Systems Using STEP Technology. In: ISCA 13th International Conference on Computer Applications in Industry and Engi. pp. 228-233
Web of Science: 0

E

Articolo in atti di convegno Agarwal Rakesh; Bruno Giorgio; Torchiano M. (2000)
Enterprise modeling using class models and instance models. In: IEEE 7th Asia-Pacific Software Engineering Conference (APSEC 2000), 3-5 Dicembre. pp. 336-343
Web of Science: 0 - Scopus: 2

Articolo in atti di convegno M. Rebaudengo; M. Sonza Reorda; M. Violante; P. Cheynet; B. Nicolescu; R. Velazco (2000)
Evaluating the effectiveness of a Software Fault-Tolerance technique on RISC- and CISC-based architectures. In: On-Line Testing Workshop, 2000. Proceedings. 6th IEEE International, Palma de Mallorca, E, 03-05 Jul 2000. pp. 17-21
Web of Science: 2 - Scopus: 7

Articolo in atti di convegno Morisio M.; Travassos G.H; Stark M. (2000)
Extending UML to Support Domain Analysis. In: 15th IEEE International Conference on Automated Software Engineering, September.
Web of Science: 12 - Scopus: 29

H

Articolo in atti di convegno Benso A.; Chiusano S.; Di Carlo S.; Prinetto P.; Ricciato F.; Spadari M.; Zorian Y. (2000)
HD2BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs. In: IEEE International Test Conference (ITC), Atlantic City (NJ), USA, 3-5 Oct. 2000. pp. 892-901
Web of Science: 19 - Scopus: 24
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L

Articolo in atti di convegno Benini L; Castelli G; Macii A; Macii E.; Poncino M; Scarsi R (2000)
Life-Time Analysis of Batteries used in Portable Digital Systems. In: MELECON-00: 11th IEEE Mediterranean Electrotechnical Conference, Nicosia, Cyprus. pp. 240-243
Web of Science: 0 - Scopus: 3

N

Articolo in atti di convegno B. Parrotta; M. Rebaudengo; M. Sonza Reorda; M. Violante (2000)
New Techniques for Accelerating Fault Injection in VHDL descriptions. In: On-Line Testing Workshop, 2000. Proceedings. 6th IEEE International, Palma de Mallorca, 3 - 5 Jul 2000. pp. 61-66
Web of Science: 12 - Scopus: 43

O

Articolo in atti di convegno Benso A.; Di Carlo S.; Chiusano S.; Prinetto P.; Ricciato F.; Lobetti Bodoni M.; Spadari M. (2000)
On integrating a proprietary and a commercial architecture for optimal BIST performances in SoCs. In: IEEE International Conference on Computer Design (ICCD), Austin (TX), USA, 17-20 Sept. 2000. pp. 539-540
Web of Science: 0 - Scopus: 0
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Articolo in atti di convegno Scarsi R; Macii E. (2000)
On the Benefits of Kernel Extraction During Logic Optimization. In: MELECON-00: 11th IEEE Mediterranean Electrotechnical Conference, Nicosia, Cyprus. pp. 53-56
Web of Science: 0 - Scopus: 0

Articolo in atti di convegno Cataldo S.; Chiusano S.; Prinetto P.; Wunderlich H.-J. (2000)
Optimal Hardware Pattern Generation for Functional BIST. In: IEEE Design, Automation and Test in Europe, 27-30 March 2000. pp. 292-297
Scopus: 15

P

Articolo in atti di convegno L. Benini; M. Ferrero; Macii A.; E. Macii; M. Poncino (2000)
Power Analysis of Software-Implemented Digital Filters: A Case Study. In: MELECON-00: IEEE Mediterranean Electrotechnical Conference, Cyprus, Maggio 2000. pp. 595-598
Web of Science: 0 - Scopus: 0

R

Articolo in atti di convegno Benini L; Bogliolo A; Macii E.; Poncino M; Surmei M (2000)
Regression-Based RTL Power Models for Controllers. In: GLS-VLSI-00: IEEE/ACM 10th Great Lakes Symposium on VLSI, Evanston, IL. pp. 147-152
Scopus: 1

S

Articolo in atti di convegno Baltatu M.; Lioy A.; Mazzocchi D. (2000)
Security Policy System: status and perspective. In: ICON-2000: IEEE Int. Conf. On Networks, Singapore, September 5-8, 2000. pp. 278-284
Web of Science: 2 - Scopus: 8

Articolo in atti di convegno Baltatu M.; Lioy A.; Maino F.; Mazzocchi D. (2000)
Security issues in control, management and routing protocols. In: TNC-2000: Terena Networking Conference 2000, Lisbon (Portugal), May 22-25, 2000.
Web of Science: 10 - Scopus: 14

Articolo di rivista Baltatu M.; Lioy A.; Maino F.; Mazzocchi D. (2000)
Security issues in control, management, and routing protocols. In: COMPUTER NETWORKS, vol. 34, no.6, pp. 881-894. - ISSN 1389-1286
Web of Science: 10 - Scopus: 14

Articolo in atti di convegno Benso A; Chiusano S; Prinetto P.; Simonotti P; Ugo G (2000)
Self-repairing in a micro-programmed processor for dependable applications. In: DFT 2000: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Yamanashi, Japan, 25-27 Sept. 2000. pp. 231-239
Web of Science: 1 - Scopus: 1

Articolo in atti di convegno B. Parrotta; M. Rebaudengo; M. Sonza Reorda; M. Violante (2000)
Speeding-up Fault Injection Campaigns in VHDL models. In: Computer Safety, Reliability and Security 19th International Conference, SAFECOMP 2000, Rotterdam (NLD), October 24–27, 2000. pp. 27-36 [Disponibilità ristretta]
Web of Science: 1 - Scopus: 3
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Articolo in atti di convegno L. Benini; M. Ferrero; A. Macii; E. Macii; M. Poncino (2000)
Supporting system-level power exploration for DSP applications. In: 10th Great Lakes Symposium on VLSI, Evanston ILL (USA), March 2-4, 2000. pp. 17-22 [Disponibilità ristretta]
Scopus: 1
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Articolo in atti di convegno L. Benini; A. Macii; E. Macii; M. Poncino (2000)
Synthesis of application-specific memories for power optimization in embedded systems. In: DAC-37: ACM/IEEE Design Automation Conference, Los Angeles CA (USA), June 5-9, 2000. pp. 300-303 [Disponibilità ristretta]
Web of Science: 14 - Scopus: 24
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