Automatic Completion and Refinement of Verification Sets for Microprocessor Cores

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Item Type: Article
MIUR type: Article > Journal article
Title: Automatic Completion and Refinement of Verification Sets for Microprocessor Cores
Authors string: Sanchez E.; Squillero G; Sonza Reorda M
University authors:
Journal or Publication Title: LECTURE NOTES IN COMPUTER SCIENCE
Referee type: Not specified type
Publisher: Springer
Page Range: pp. 205-214
Number of Pages: 10
ISSN: 0302-9743
Abstract: In the design cycle of a microprocessor core, the unit is usually refined through a series of subsequent steps. To deliver a flaw free unit at the end of the process, in each stage a verification step is required. While it would be useful to automatically develop the set of test programs for verification concurrently to the design, in most of the existing approach verification is performed manually and starting from scratch. This paper presented a methodology for the automatic completion and refinement of existing verification programs. It shows a new technique for allowing a Genetic Programming-based framework to import an existing test-program set and assimilate it for further test generation. A case study is considered, in which a sample pipelined processor is used, and new test programs are generated starting from existing functional ones. Different metrics are targeted, and preliminary results are reported, showing the effectiveness of the method with respect to a pure random approach
Date: 2005
Status: Published
Language of publication: English
Uncontrolled Keywords:
Departments (original): DAUIN - Control and Computer Engineering
Departments: DAUIN - Department of Control and Computer Engineering
Related URLs:
    Subjects: Area 09 - Ingegneria industriale e dell'informazione > SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI
    Date Deposited: 13 Jan 2009 03:01
    Last Modified: 16 Oct 2013 03:14
    Id Number (DOI): 10.110.1007/978-3-540-32003-6_21007/b106856
    Permalink: http://porto.polito.it/id/eprint/1877279
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